diff options
Diffstat (limited to 'target/linux/rockchip/patches-6.1/019-v6.3-arm64-dts-rockchip-Enable-WiFi-BT-support-for-Radxa-CM3.patch')
| -rw-r--r-- | target/linux/rockchip/patches-6.1/019-v6.3-arm64-dts-rockchip-Enable-WiFi-BT-support-for-Radxa-CM3.patch | 134 |
1 files changed, 134 insertions, 0 deletions
diff --git a/target/linux/rockchip/patches-6.1/019-v6.3-arm64-dts-rockchip-Enable-WiFi-BT-support-for-Radxa-CM3.patch b/target/linux/rockchip/patches-6.1/019-v6.3-arm64-dts-rockchip-Enable-WiFi-BT-support-for-Radxa-CM3.patch new file mode 100644 index 0000000000..9855b9e1a6 --- /dev/null +++ b/target/linux/rockchip/patches-6.1/019-v6.3-arm64-dts-rockchip-Enable-WiFi-BT-support-for-Radxa-CM3.patch @@ -0,0 +1,134 @@ +From af5a803bf212e077e5fb7a1d4cf6be02f74a74ca Mon Sep 17 00:00:00 2001 +From: Jagan Teki <jagan@amarulasolutions.com> +Date: Wed, 25 Jan 2023 21:40:23 +0530 +Subject: [PATCH] arm64: dts: rockchip: rk3566: Enable WiFi, BT support for + Radxa CM3 + +Radxa Compute Module 3 has an onboard AW_CM256SM WiFi/BT module. + +Add nodes for enabling it. + +Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> +Link: https://lore.kernel.org/r/20230125161023.12115-2-jagan@amarulasolutions.com +Signed-off-by: Heiko Stuebner <heiko@sntech.de> +--- + .../boot/dts/rockchip/rk3566-radxa-cm3.dtsi | 80 +++++++++++++++++++ + 1 file changed, 80 insertions(+) + +--- a/arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3.dtsi +@@ -66,6 +66,15 @@ + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc_1v8_p>; + }; ++ ++ sdio_pwrseq: pwrseq-sdio { ++ compatible = "mmc-pwrseq-simple"; ++ clocks = <&rk817 1>; ++ clock-names = "ext_clock"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&wifi_reg_on_h>; ++ reset-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_LOW>; ++ }; + }; + + &cpu0 { +@@ -287,6 +296,20 @@ + }; + + &pinctrl { ++ bluetooth { ++ bt_host_wake_h: bt-host-wake-h { ++ rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ bt_reg_on_h: bt-reg-on-h { ++ rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ bt_wake_host_h: bt-wake-host-h { ++ rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; +@@ -298,6 +321,16 @@ + rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; ++ ++ wifi { ++ wifi_reg_on_h: wifi-reg-on-h { ++ rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ wifi_host_wake_h: wifi-host-wake-h { ++ rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; + }; + + &pmu_io_domains { +@@ -318,6 +351,34 @@ + status = "okay"; + }; + ++&sdmmc1 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ bus-width = <4>; ++ disable-wp; ++ cap-sd-highspeed; ++ cap-sdio-irq; ++ keep-power-in-suspend; ++ mmc-pwrseq = <&sdio_pwrseq>; ++ non-removable; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_clk &sdmmc1_cmd>; ++ sd-uhs-sdr104; ++ vmmc-supply = <&vcc_3v3>; ++ vqmmc-supply = <&vcc_1v8>; ++ status = "okay"; ++ ++ wifi@1 { ++ compatible = "brcm,bcm43455-fmac"; ++ reg = <1>; ++ interrupt-parent = <&gpio2>; ++ interrupts = <RK_PC1 IRQ_TYPE_LEVEL_HIGH>; ++ interrupt-names = "host-wake"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&wifi_host_wake_h>; ++ }; ++}; ++ + &sdhci { + bus-width = <8>; + max-frequency = <200000000>; +@@ -330,6 +391,25 @@ + status = "okay"; + }; + ++&uart1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart1m0_ctsn &uart1m0_rtsn &uart1m0_xfer>; ++ status = "okay"; ++ ++ bluetooth { ++ compatible = "brcm,bcm4345c5"; ++ clocks = <&rk817 1>; ++ clock-names = "lpo"; ++ device-wakeup-gpios = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>; ++ host-wakeup-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_HIGH>; ++ reset-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_LOW>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&bt_host_wake_h &bt_reg_on_h &bt_wake_host_h>; ++ vbat-supply = <&vcc_3v3>; ++ vddio-supply = <&vcc_1v8>; ++ }; ++}; ++ + &usb2phy0 { + status = "okay"; + }; |