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authorRobert Marko <robimarko@gmail.com>2023-08-11 23:51:40 +0200
committerHauke Mehrtens <hauke@hauke-m.de>2023-08-15 16:41:22 +0200
commit0e6982b253b9c2ae0975aabe6318ad2d03f7d76c (patch)
treede8ad92f3a23d7879cfa1c51838e2150c48c5073 /target/linux/ipq40xx/files/arch
parent7661e164c049bc59ab54e01f00d1e59f2877b765 (diff)
ipq40xx: Use SoC DTSI for Teltonika RUTX
Teltonika RUTX currently is the only device pulling in DK01 DTSI and thus preventing removal of DK01 and DK04 support. So, lets add the missing nodes from DK01 DTSI and use the SoC DTSI instead. Signed-off-by: Robert Marko <robimarko@gmail.com>
Diffstat (limited to 'target/linux/ipq40xx/files/arch')
-rw-r--r--target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-rutx.dtsi158
1 files changed, 136 insertions, 22 deletions
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-rutx.dtsi b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-rutx.dtsi
index df9425b12a..737e7365a6 100644
--- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-rutx.dtsi
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-rutx.dtsi
@@ -1,9 +1,10 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-#include "qcom-ipq4019-ap.dk01.1.dtsi"
+#include "qcom-ipq4019.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
+#include <dt-bindings/soc/qcom,tcsr.h>
/ {
memory {
@@ -11,28 +12,39 @@
reg = <0x80000000 0x10000000>;
};
+ aliases {
+ serial0 = &blsp1_uart1;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
soc {
- pinctrl@1000000 {
- mdio_pins: mdio_pinmux {
- mux_1 {
- pins = "gpio53";
- function = "mdio";
- bias-pull-up;
- };
- mux_2 {
- pins = "gpio52";
- function = "mdc";
- bias-pull-up;
- };
- };
-
- i2c_0_pins: i2c_0_pinmux {
- mux {
- pins = "gpio58", "gpio59";
- function = "blsp_i2c0";
- bias-disable;
- };
- };
+ tcsr@1949000 {
+ compatible = "qcom,tcsr";
+ reg = <0x1949000 0x100>;
+ qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+ };
+
+ tcsr@194b000 {
+ status = "okay";
+
+ compatible = "qcom,tcsr";
+ reg = <0x194b000 0x100>;
+ qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+ };
+
+ ess_tcsr@1953000 {
+ compatible = "qcom,tcsr";
+ reg = <0x1953000 0x1000>;
+ qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+ };
+
+ tcsr@1957000 {
+ compatible = "qcom,tcsr";
+ reg = <0x1957000 0x100>;
+ qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
};
keys {
@@ -47,9 +59,91 @@
};
};
+&prng {
+ status = "okay";
+};
+
+&watchdog {
+ status = "okay";
+};
+
+&cryptobam {
+ status = "okay";
+};
+
+&crypto {
+ status = "okay";
+};
+
+&tlmm {
+ serial_pins: serial_pinmux {
+ mux {
+ pins = "gpio60", "gpio61";
+ function = "blsp_uart0";
+ bias-disable;
+ };
+ };
+
+ spi_0_pins: spi_0_pinmux {
+ pinmux {
+ function = "blsp_spi0";
+ pins = "gpio55", "gpio56", "gpio57";
+ };
+ pinmux_cs {
+ function = "gpio";
+ pins = "gpio54";
+ };
+ pinconf {
+ pins = "gpio55", "gpio56", "gpio57";
+ drive-strength = <12>;
+ bias-disable;
+ };
+ pinconf_cs {
+ pins = "gpio54";
+ drive-strength = <2>;
+ bias-disable;
+ output-high;
+ };
+ };
+
+ mdio_pins: mdio_pinmux {
+ mux_1 {
+ pins = "gpio53";
+ function = "mdio";
+ bias-pull-up;
+ };
+ mux_2 {
+ pins = "gpio52";
+ function = "mdc";
+ bias-pull-up;
+ };
+ };
+
+ i2c_0_pins: i2c_0_pinmux {
+ mux {
+ pins = "gpio58", "gpio59";
+ function = "blsp_i2c0";
+ bias-disable;
+ };
+ };
+};
+
+&blsp_dma {
+ status = "okay";
+};
+
+&blsp1_uart1 {
+ pinctrl-0 = <&serial_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+
&blsp1_spi1 {
+ pinctrl-0 = <&spi_0_pins>;
+ pinctrl-names = "default";
cs-gpios = <&tlmm 54 0>, <&tlmm 63 0>;
num-cs = <2>;
+ status = "okay";
xt25f128b@0 {
/*
@@ -208,3 +302,23 @@
pinctrl-names = "default";
phy-reset-gpio = <&tlmm 62 0>;
};
+
+&usb3_ss_phy {
+ status = "okay";
+};
+
+&usb3_hs_phy {
+ status = "okay";
+};
+
+&usb3 {
+ status = "okay";
+};
+
+&usb2_hs_phy {
+ status = "okay";
+};
+
+&usb2 {
+ status = "okay";
+};