| Commit message (Collapse) | Author | Age |
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Now we support parsing the color and function properties.
Ref: e814acc59948 ("base-files: support parse DT LED color and function")
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
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FriendlyElec renamed the NanoPi R4S board with EEPROM (mac address)
to "enterprise" edition, and it was added as a "new" board in upstream
kernel.
This patch switched to use that upstreamed dts and removed local
EEPROM patch.
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
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The NanoPi R2C Plus is a small variant of NanoPi R2C with a on-board
eMMC flash (8G) included.
Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card or
internal eMMC using dd.
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
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Hardware
--------
RockChip RK3568 ARM64 (4 cores)
1GB or 4GB LPDDR4X RAM
2x 2500 Base-T
4 LEDs (LAN / WAN / WIFI / POWER)
1 Button (Reset)
8GB or 32GB eMMC on-board
Micro-SD Slot
M.2 Slot
2x USB 3.0 Port
Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card or
internal eMMC using dd.
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
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Hardware
--------
RockChip RK3568 ARM64 (4 cores)
2GB or 4GB LPDDR4X RAM
1x 1000 Base-T
2x 2500 Base-T
4 LEDs (LAN1 / LAN2 / WAN / POWER)
8GB eMMC on-board
Micro-SD Slot
M.2 Slot
2x USB 3.0 Port
Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card or
internal eMMC using dd.
Tested-by: Packet Please <pktpls@systemli.org>
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
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The OrangePi R1 Plus LTS is a minor variant of OrangePi R1 Plus with
the on-board NIC chip changed from rtl8211e to yt8531c, and otherwise
identical to OrangePi R1 Plus.
Tested-by: Volkan Yetik <no3iverson@gmail.com>
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
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Orange Pi R1 Plus is a Rockchip RK3328 based SBC by Xunlong.
This device is similar to the NanoPi R2S, and has a 16MB
SPI NOR (mx25l12805d). The reset button is changed to
directly reset the power supply, another detail is that
both network ports have independent MAC addresses.
Note: booting from SPI is currently unsupported, you have to install
the image on a SD card.
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
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The NanoPi R2C is a minor variant of NanoPi R2S with the on-board NIC
chip changed from rtl8211e to yt8521s, and otherwise identical to R2S.
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
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Hardware
--------
RockChip RK3399 ARM64 (6 cores)
4GB LPDDR4 RAM
2x 1000 Base-T
3 LEDs (LAN / WAN / SYS)
1 Button (Reset)
Micro-SD slot
2x USB 3.0 Port
Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card using
dd.
=====================================
NOTICE FOR USERS WHO USE 1GB VERSION:
BY NOW IT IS NOT SUPPORTED
====================================
[initialed target]
Co-developed-by: Marty Jones <mj8263788@gmail.com>
Signed-off-by: Marty Jones <mj8263788@gmail.com>
[fixed bootscript]
Co-developed-by: Jayantajit Gogoi <jayanta.gogoi525@gmail.com>
Signed-off-by: Jayantajit Gogoi <jayanta.gogoi525@gmail.com>
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
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So far, board.d files were having execute bit set and contained a
shebang. However, they are just sourced in board_detect, with an
apparantly unnecessary check for execute permission beforehand.
Replace this check by one for existance and make the board.d files
"normal" files, as would be expected in /etc anyway.
Note:
This removes an apparantly unused '#!/bin/sh /etc/rc.common' in
target/linux/bcm47xx/base-files/etc/board.d/01_network
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
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Hardware
--------
RockChip RK3328 ARM64 (4 cores)
1GB DDR4 RAM
2x 1000 Base-T
3 LEDs (LAN / WAN / SYS)
1 Button (Reset)
Micro-SD slot
USB 2.0 Port
Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card using
dd.
MAC-address
-----------
The vendor code supports reading a MAC address from an EEPROM connected
via i2c0 of the SoC. The EEPROM (address 0x51) should contain the MAC
address in binary at offset 0xfa. However, my two units didn't come with
such an EEPROM soldered on. The EEPROM should be placed between the SoC
and the GPIO pins on the board. (U10)
Generating rendom MAC addresses works around this issue. Otherwise, all
boards running the same image have identical MAC addresses.
Signed-off-by: David Bauer <mail@david-bauer.net>
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