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-rw-r--r--target/linux/mediatek/dts/mt7981b-cetron-ct3003.dts242
-rw-r--r--target/linux/mediatek/filogic/base-files/etc/board.d/02_network6
-rw-r--r--target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac5
-rw-r--r--target/linux/mediatek/image/filogic.mk32
4 files changed, 285 insertions, 0 deletions
diff --git a/target/linux/mediatek/dts/mt7981b-cetron-ct3003.dts b/target/linux/mediatek/dts/mt7981b-cetron-ct3003.dts
new file mode 100644
index 0000000000..d39083ffb0
--- /dev/null
+++ b/target/linux/mediatek/dts/mt7981b-cetron-ct3003.dts
@@ -0,0 +1,242 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+#include "mt7981.dtsi"
+
+/ {
+ model = "Cetron CT3003";
+ compatible = "cetron,ct3003", "mediatek,mt7981";
+
+ aliases {
+ serial0 = &uart0;
+ led-boot = &led_status_red;
+ led-failsafe = &led_status_red;
+ led-running = &led_status_green;
+ led-upgrade = &led_status_green;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory {
+ reg = <0 0x40000000 0 0x10000000>;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ reset {
+ label = "reset";
+ linux,code = <KEY_RESTART>;
+ gpios = <&pio 1 GPIO_ACTIVE_LOW>;
+ };
+
+ wps {
+ label = "wps";
+ linux,code = <KEY_WPS_BUTTON>;
+ gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led_status_red: led_status_red {
+ label = "red:status";
+ gpios = <&pio 3 GPIO_ACTIVE_LOW>;
+ };
+
+ led_status_green: led_status_green {
+ label = "green:status";
+ gpios = <&pio 7 GPIO_ACTIVE_LOW>;
+ };
+ };
+};
+
+&eth {
+ status = "okay";
+
+ gmac0: mac@0 {
+ compatible = "mediatek,eth-mac";
+ reg = <0>;
+ phy-mode = "2500base-x";
+
+ nvmem-cells = <&macaddr_art_0>;
+ nvmem-cell-names = "mac-address";
+
+ fixed-link {
+ speed = <2500>;
+ full-duplex;
+ pause;
+ };
+ };
+};
+
+&mdio_bus {
+ switch: switch@0 {
+ compatible = "mediatek,mt7531";
+ reg = <31>;
+ reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ interrupt-parent = <&pio>;
+ interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
+ };
+};
+
+&spi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_flash_pins>;
+ status = "okay";
+
+ spi_nand@0 {
+ compatible = "spi-nand";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0>;
+
+ spi-max-frequency = <52000000>;
+ spi-tx-buswidth = <4>;
+ spi-rx-buswidth = <4>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ mediatek,nmbm;
+ mediatek,bmt-max-ratio = <1>;
+ mediatek,bmt-max-reserved-blocks = <64>;
+
+ partition@0 {
+ label = "BL2";
+ reg = <0x0000000 0x0100000>;
+ read-only;
+ };
+
+ partition@100000 {
+ label = "u-boot-env";
+ reg = <0x0100000 0x0080000>;
+ };
+
+ partition@180000 {
+ label = "art";
+ reg = <0x0180000 0x0100000>;
+ read-only;
+
+ compatible = "nvmem-cells";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ macaddr_art_0: macaddr@0 {
+ reg = <0x0 0x6>;
+ };
+ };
+
+ factory: partition@280000 {
+ label = "Factory";
+ reg = <0x0280000 0x0100000>;
+ read-only;
+ };
+
+ partition@380000 {
+ label = "FIP";
+ reg = <0x0380000 0x0200000>;
+ read-only;
+ };
+
+ partition@580000 {
+ label = "ubi";
+ reg = <0x0580000 0x2000000>;
+ };
+
+ partition@2580000 {
+ label = "ubi_backup";
+ reg = <0x2580000 0x2000000>;
+ };
+
+ partition@4580000 {
+ label = "Config_backup";
+ reg = <0x4580000 0x0400000>;
+ };
+ };
+ };
+};
+
+&switch {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ label = "lan1";
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan2";
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan3";
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "wan";
+ };
+
+ port@6 {
+ reg = <6>;
+ ethernet = <&gmac0>;
+ phy-mode = "2500base-x";
+
+ fixed-link {
+ speed = <2500>;
+ full-duplex;
+ pause;
+ };
+ };
+ };
+};
+
+&pio {
+ spi0_flash_pins: spi0-pins {
+ mux {
+ function = "spi";
+ groups = "spi0", "spi0_wp_hold";
+ };
+
+ conf-pu {
+ pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
+ };
+
+ conf-pd {
+ pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
+ };
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&watchdog {
+ status = "okay";
+};
+
+&wifi {
+ status = "okay";
+
+ mediatek,mtd-eeprom = <&factory 0x0>;
+};
diff --git a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network
index e5872e7fe4..680bee604f 100644
--- a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network
+++ b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network
@@ -42,6 +42,7 @@ mediatek_setup_interfaces()
mercusys,mr90x-v1)
ucidef_set_interfaces_lan_wan "lan0 lan1 lan2" eth1
;;
+ cetron,ct3003|\
qihoo,360t7)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" wan
;;
@@ -82,6 +83,11 @@ mediatek_setup_macs()
bananapi,bpi-r3)
wan_mac=$(macaddr_add $(cat /sys/class/net/eth0/address) 1)
;;
+ cetron,ct3003)
+ lan_mac=$(mtd_get_mac_binary "art" 0)
+ wan_mac=$(macaddr_add "$lan_mac" 3)
+ label_mac=$lan_mac
+ ;;
h3c,magic-nx30-pro)
wan_mac=$(mtd_get_mac_ascii pdt_data_1 ethaddr)
lan_mac=$(macaddr_add "$wan_mac" 1)
diff --git a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac
index ebf76640c8..ea85939068 100644
--- a/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac
+++ b/target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac
@@ -30,6 +30,11 @@ case "$board" in
[ "$PHYNBR" = "0" ] && macaddr_unsetbit $addr 6 > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "1" ] && macaddr_setbit $addr 6 > /sys${DEVPATH}/macaddress
;;
+ cetron,ct3003)
+ addr=$(mtd_get_mac_binary "art" 0)
+ [ "$PHYNBR" = "0" ] && macaddr_add $addr 1 > /sys${DEVPATH}/macaddress
+ [ "$PHYNBR" = "1" ] && macaddr_setbit_la $(macaddr_add $addr 2) > /sys${DEVPATH}/macaddress
+ ;;
cudy,wr3000-v1)
addr=$(mtd_get_mac_binary bdinfo 0xde00)
# Originally, phy0 is phy1 mac with LA bit set. However, this would conflict
diff --git a/target/linux/mediatek/image/filogic.mk b/target/linux/mediatek/image/filogic.mk
index a799c7b5ee..571815249f 100644
--- a/target/linux/mediatek/image/filogic.mk
+++ b/target/linux/mediatek/image/filogic.mk
@@ -90,6 +90,21 @@ define Build/zyxel-nwa-fit-filogic
@mv $@.new $@
endef
+define Build/cetron-header
+ $(eval magic=$(word 1,$(1)))
+ $(eval model=$(word 2,$(1)))
+ ( \
+ dd if=/dev/zero bs=856 count=1 2>/dev/null; \
+ printf "$(model)," | dd bs=128 count=1 conv=sync 2>/dev/null; \
+ md5sum $@ | cut -f1 -d" " | dd bs=32 count=1 2>/dev/null; \
+ printf "$(magic)" | dd bs=4 count=1 conv=sync 2>/dev/null; \
+ cat $@; \
+ ) > $@.tmp
+ fw_crc=$$(gzip -c $@.tmp | tail -c 8 | od -An -N4 -tx4 --endian little | tr -d ' \n'); \
+ printf "$$(echo $$fw_crc | sed 's/../\\x&/g')" | cat - $@.tmp > $@
+ rm $@.tmp
+endef
+
define Device/asus_tuf-ax4200
DEVICE_VENDOR := ASUS
DEVICE_MODEL := TUF-AX4200
@@ -172,6 +187,23 @@ define Device/bananapi_bpi-r3
endef
TARGET_DEVICES += bananapi_bpi-r3
+define Device/cetron_ct3003
+ DEVICE_VENDOR := Cetron
+ DEVICE_MODEL := CT3003
+ DEVICE_DTS := mt7981b-cetron-ct3003
+ DEVICE_DTS_DIR := ../dts
+ SUPPORTED_DEVICES += mediatek,mt7981-spim-snand-rfb
+ DEVICE_PACKAGES := kmod-mt7981-firmware mt7981-wo-firmware
+ UBINIZE_OPTS := -E 5
+ BLOCKSIZE := 128k
+ PAGESIZE := 2048
+ KERNEL_IN_UBI := 1
+ IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
+ IMAGES += factory.bin
+ IMAGE/factory.bin := $$(IMAGE/sysupgrade.bin) | cetron-header rd30 CT3003
+endef
+TARGET_DEVICES += cetron_ct3003
+
define Device/cudy_wr3000-v1
DEVICE_VENDOR := Cudy
DEVICE_MODEL := WR3000