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authorTobias Schramm <tobias@t-sys.eu>2023-09-23 13:46:40 +0200
committerChristian Marangi <ansuelsmth@gmail.com>2023-10-03 19:09:32 +0200
commitcd56a682326f9de4d77ee3afb99d13d25c478c08 (patch)
tree5fb81349e3f2d84640250d91a9367fda9d4eb68c /target/linux/realtek/files-5.15/drivers/net
parent9fb5082e258ac4672dc69636e5eb79f426defac8 (diff)
realtek: 5.15: rtl93xx: support 2500baseT and 5000baseT on USXGMII links
The USXGMII implementation of Realtek switches can not only support 10GbE but also 2.5Gb and 5Gb on top of the usual data rates. Mark those as supported to allow them to be negotiated. This change has been tested on a ZyXEL XGS1250-12 with the following link partners: - NWA50AX Pro (2.5Gb) - RTL8152 USB NIC (2.5Gb) - AQC111 USB NIC (2.5Gb & 5Gb) Gbit and 10GbE has also been tested to still work fine with a variety of devices. Signed-off-by: Tobias Schramm <tobias@t-sys.eu>
Diffstat (limited to 'target/linux/realtek/files-5.15/drivers/net')
-rw-r--r--target/linux/realtek/files-5.15/drivers/net/dsa/rtl83xx/dsa.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/target/linux/realtek/files-5.15/drivers/net/dsa/rtl83xx/dsa.c b/target/linux/realtek/files-5.15/drivers/net/dsa/rtl83xx/dsa.c
index 6f55f1e892..6b661f90ad 100644
--- a/target/linux/realtek/files-5.15/drivers/net/dsa/rtl83xx/dsa.c
+++ b/target/linux/realtek/files-5.15/drivers/net/dsa/rtl83xx/dsa.c
@@ -429,8 +429,11 @@ static void rtl93xx_phylink_validate(struct dsa_switch *ds, int port,
phylink_set(mask, 10000baseCR_Full);
}
- if (state->interface == PHY_INTERFACE_MODE_USXGMII)
+ if (state->interface == PHY_INTERFACE_MODE_USXGMII) {
+ phylink_set(mask, 2500baseT_Full);
+ phylink_set(mask, 5000baseT_Full);
phylink_set(mask, 10000baseT_Full);
+ }
phylink_set(mask, 10baseT_Half);
phylink_set(mask, 10baseT_Full);