diff options
author | Chukun Pan <amadeus@jmu.edu.cn> | 2024-03-26 23:16:05 +0800 |
---|---|---|
committer | Robert Marko <robimarko@gmail.com> | 2024-04-17 12:08:56 +0200 |
commit | 9cef2bc224b9bda19a8a79df6d1de9560c081ce2 (patch) | |
tree | e6892f8488c5fa9b1ce420ac8b6e6ebda12c9451 /target/linux/qualcommax/files/arch/arm64/boot | |
parent | 74eb7188714bdafa5a7b56ffb48ad8474e107449 (diff) |
ipq807x: add support for Zbtlink ZBT-Z800AX
Hardware specifications:
SoC: Qualcomm IPQ8072A
RAM: 1GB of DDR4 600MHz
Flash1: Winbond W25Q64DW 8MB
Flash2: MX30UF2G28AD 256MB
WiFi1: QCN5024 2.4GHz AX 4x4
WiFi2: QCN5054 5GHz AX 4x4
Ethernet: 5x 1G RJ45 port
USB: 2x USB 3.0 (1x M.2)
Button: Reset, WPS
Flash instructions:
Upload factory.bin in stock firmware's
upgrade page, do not preserve settings.
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Diffstat (limited to 'target/linux/qualcommax/files/arch/arm64/boot')
-rw-r--r-- | target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-zbt-z800ax.dts | 454 |
1 files changed, 454 insertions, 0 deletions
diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-zbt-z800ax.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-zbt-z800ax.dts new file mode 100644 index 0000000000..c352b72567 --- /dev/null +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-zbt-z800ax.dts @@ -0,0 +1,454 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +/dts-v1/; + +#include "ipq8074.dtsi" +#include "ipq8074-hk-cpu.dtsi" +#include "ipq8074-ess.dtsi" +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/leds/common.h> + +/ { + model = "Zbtlink ZBT-Z800AX"; + compatible = "zbtlink,zbt-z800ax", "qcom,ipq8074"; + + aliases { + led-boot = &led_net; + led-failsafe = &led_net; + led-upgrade = &led_net; + serial0 = &blsp1_uart5; + /* + * Aliases as required by u-boot + * to patch MAC addresses + */ + ethernet0 = &dp1; + ethernet1 = &dp2; + ethernet2 = &dp3; + ethernet3 = &dp4; + ethernet4 = &dp5; + label-mac-device = &dp1; + }; + + chosen { + stdout-path = "serial0:115200n8"; + bootargs-append = " root=/dev/ubiblock0_1"; + }; + + gpio-export { + compatible = "gpio-export"; + + lte-power { + gpio-export,name = "lte_power"; + gpio-export,output = <1>; + gpios = <&tlmm 55 GPIO_ACTIVE_HIGH>; + }; + }; + + keys { + compatible = "gpio-keys"; + pinctrl-0 = <&button_pins>; + pinctrl-names = "default"; + + reset { + label = "reset"; + linux,code = <KEY_RESTART>; + gpios = <&tlmm 34 GPIO_ACTIVE_LOW>; + }; + + wps { + label = "wps"; + linux,code = <KEY_WPS_BUTTON>; + gpios = <&tlmm 46 GPIO_ACTIVE_LOW>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_net: net { + color = <LED_COLOR_ID_GREEN>; + function = LED_FUNCTION_WAN_ONLINE; + gpios = <&tlmm 22 GPIO_ACTIVE_HIGH>; + }; + + module { + color = <LED_COLOR_ID_GREEN>; + function = LED_FUNCTION_MOBILE; + gpios = <&tlmm 30 GPIO_ACTIVE_HIGH>; + }; + + wlan2g { + color = <LED_COLOR_ID_GREEN>; + function = LED_FUNCTION_WLAN_2GHZ; + gpios = <&tlmm 42 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "phy1radio"; + }; + + wlan5g { + color = <LED_COLOR_ID_GREEN>; + function = LED_FUNCTION_WLAN_5GHZ; + gpios = <&tlmm 43 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "phy0radio"; + }; + }; +}; + +&tlmm { + button_pins: button-pins { + mux { + pins = "gpio34", "gpio46"; + function = "gpio"; + drive-strength = <8>; + bias-pull-up; + }; + }; + + mdio_pins: mdio-pins { + mdc { + pins = "gpio68"; + function = "mdc"; + drive-strength = <8>; + bias-pull-up; + }; + + mdio { + pins = "gpio69"; + function = "mdio"; + drive-strength = <8>; + bias-pull-up; + }; + }; +}; + +&blsp1_spi1 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + cs-select = <0>; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + spi-max-frequency = <50000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "0:sbl1"; + reg = <0x0 0x50000>; + read-only; + }; + + partition@50000 { + label = "0:mibib"; + reg = <0x50000 0x10000>; + read-only; + }; + + partition@60000 { + label = "0:bootconfig"; + reg = <0x60000 0x20000>; + read-only; + }; + + partition@80000 { + label = "0:bootconfig1"; + reg = <0x80000 0x20000>; + read-only; + }; + + partition@a0000 { + label = "0:qsee"; + reg = <0xa0000 0x180000>; + read-only; + }; + + partition@220000 { + label = "0:qsee_1"; + reg = <0x220000 0x180000>; + read-only; + }; + + partition@3a0000 { + label = "0:devcfg"; + reg = <0x3a0000 0x10000>; + read-only; + }; + + partition@3b0000 { + label = "0:devcfg_1"; + reg = <0x3b0000 0x10000>; + read-only; + }; + + partition@3c0000 { + label = "0:apdp"; + reg = <0x3c0000 0x10000>; + read-only; + }; + + partition@3d0000 { + label = "0:apdp_1"; + reg = <0x3d0000 0x10000>; + read-only; + }; + + partition@3e0000 { + label = "0:rpm"; + reg = <0x3e0000 0x40000>; + read-only; + }; + + partition@420000 { + label = "0:rpm_1"; + reg = <0x420000 0x40000>; + read-only; + }; + + partition@460000 { + label = "0:cdt"; + reg = <0x460000 0x10000>; + read-only; + }; + + partition@470000 { + label = "0:cdt_1"; + reg = <0x470000 0x10000>; + read-only; + }; + + partition@480000 { + label = "0:appsblenv"; + reg = <0x480000 0x10000>; + }; + + partition@490000 { + label = "0:appsbl"; + reg = <0x490000 0xa0000>; + read-only; + }; + + partition@530000 { + label = "0:appsbl_1"; + reg = <0x530000 0xa0000>; + read-only; + }; + + partition@5d0000 { + label = "0:art"; + reg = <0x5d0000 0x40000>; + read-only; + }; + + partition@610000 { + label = "0:ethphyfw"; + reg = <0x610000 0x80000>; + read-only; + }; + }; + }; +}; + +&blsp1_uart5 { + status = "okay"; +}; + +&cryptobam { + status = "okay"; +}; + +&crypto { + status = "okay"; +}; + +&prng { + status = "okay"; +}; + +&qpic_bam { + status = "okay"; +}; + +&qpic_nand { + status = "okay"; + + partitions { + status = "disabled"; + }; + + nand@0 { + reg = <0>; + nand-ecc-strength = <8>; + nand-ecc-step-size = <512>; + nand-bus-width = <8>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "rootfs"; + reg = <0x0000000 0x3400000>; + }; + + partition@3400000 { + label = "0:wififw"; + reg = <0x3400000 0x0800000>; + read-only; + }; + + partition@3c00000 { + label = "rootfs_1"; + reg = <0x3c00000 0x3400000>; + }; + + partition@7000000 { + label = "0:wififw_1"; + reg = <0x7000000 0x0800000>; + read-only; + }; + }; + }; +}; + +&qusb_phy_0 { + status = "okay"; +}; + +&qusb_phy_1 { + status = "okay"; +}; + +&ssphy_0 { + status = "okay"; +}; + +&ssphy_1 { + status = "okay"; +}; + +&usb_0 { + status = "okay"; +}; + +&usb_1 { + status = "okay"; +}; + +&mdio { + status = "okay"; + + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + reset-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>; + + ethernet-phy-package@0 { + compatible = "qcom,qca8075-package"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + qca8075_0: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0>; + }; + + qca8075_1: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + }; + + qca8075_2: ethernet-phy@2 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <2>; + }; + + qca8075_3: ethernet-phy@3 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <3>; + }; + + qca8075_4: ethernet-phy@4 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <4>; + }; + }; +}; + +&switch { + status = "okay"; + + switch_lan_bmp = <(ESS_PORT1 | ESS_PORT2 | ESS_PORT3 | ESS_PORT4)>; + switch_wan_bmp = <ESS_PORT5>; + switch_mac_mode = <MAC_MODE_PSGMII>; + + qcom,port_phyinfo { + port@1 { + port_id = <1>; + phy_address = <0>; + }; + port@2 { + port_id = <2>; + phy_address = <1>; + }; + port@3 { + port_id = <3>; + phy_address = <2>; + }; + port@4 { + port_id = <4>; + phy_address = <3>; + }; + port@5 { + port_id = <5>; + phy_address = <4>; + }; + }; +}; + +&edma { + status = "okay"; +}; + +&dp1 { + status = "okay"; + phy-handle = <&qca8075_0>; + label = "lan1"; +}; + +&dp2 { + status = "okay"; + phy-handle = <&qca8075_1>; + label = "lan2"; +}; + +&dp3 { + status = "okay"; + phy-handle = <&qca8075_2>; + label = "lan3"; +}; + +&dp4 { + status = "okay"; + phy-handle = <&qca8075_3>; + label = "lan4"; +}; + +&dp5 { + status = "okay"; + phy-handle = <&qca8075_4>; + label = "wan"; +}; + +&wifi { + status = "okay"; + + qcom,ath11k-calibration-variant = "ZBT-Z800AX"; +}; |