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authorRobert Marko <robimarko@gmail.com>2023-11-29 19:24:18 +0100
committerChristian Marangi <ansuelsmth@gmail.com>2024-01-26 15:30:02 +0100
commit845caa8d4688bf0901f3998fdc6ed3a75d2ce2d7 (patch)
tree7b90f40dddb961557c0c6ed4e7391916ade13975 /target/linux/qualcommax/files/arch/arm64/boot
parent137694eaffaeba94f0524fe3f9a5148f54d3cb8a (diff)
qualcommax: 301w: correct AQR reset GPIO-s
It seems that the reset GPIO-s defined for the two AQR PHY-s are actually reversed. Manually testing confirmed that GPIO44 is actually reset GPIO of AQR at 0, while GPIO59 is reset of AQR at 8: root@OpenWrt:~# mdio 9* DEV PHY-ID LINK 0x00 0x00000000 down 0x08 0x00000000 down 0x10 0x004dd0b1 down 0x11 0x004dd0b1 down 0x12 0x004dd0b1 down 0x13 0x004dd0b1 up 0x14 0x004dd0b1 down 0x15 0x04820a05 down root@OpenWrt:~# gpioset gpiochip0 44=0 root@OpenWrt:~# mdio 9* DEV PHY-ID LINK 0x08 0x00000000 down 0x10 0x004dd0b1 down 0x11 0x004dd0b1 down 0x12 0x004dd0b1 down 0x13 0x004dd0b1 up 0x14 0x004dd0b1 down 0x15 0x04820a05 down root@OpenWrt:~# gpioset gpiochip0 44=1 root@OpenWrt:~# mdio 9* DEV PHY-ID LINK 0x00 0x00000000 down 0x08 0x00000000 down 0x10 0x004dd0b1 down 0x11 0x004dd0b1 down 0x12 0x004dd0b1 down 0x13 0x004dd0b1 up 0x14 0x004dd0b1 down 0x15 0x04820a05 down root@OpenWrt:~# gpioset gpiochip0 59=0 root@OpenWrt:~# mdio 9* DEV PHY-ID LINK 0x00 0x00000000 down 0x10 0x004dd0b1 down 0x11 0x004dd0b1 down 0x12 0x004dd0b1 down 0x13 0x004dd0b1 up 0x14 0x004dd0b1 down 0x15 0x04820a05 down root@OpenWrt:~# gpioset gpiochip0 59=1 root@OpenWrt:~# mdio 9* DEV PHY-ID LINK 0x00 0x00000000 down 0x08 0x00000000 down 0x10 0x004dd0b1 down 0x11 0x004dd0b1 down 0x12 0x004dd0b1 down 0x13 0x004dd0b1 up 0x14 0x004dd0b1 down 0x15 0x04820a05 down Signed-off-by: Robert Marko <robimarko@gmail.com>
Diffstat (limited to 'target/linux/qualcommax/files/arch/arm64/boot')
-rw-r--r--target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-301w.dts4
1 files changed, 2 insertions, 2 deletions
diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-301w.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-301w.dts
index 8ce22c1c06..8b392c0fba 100644
--- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-301w.dts
+++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-301w.dts
@@ -275,14 +275,14 @@
aqr113c_0: ethernet-phy@0 {
compatible ="ethernet-phy-ieee802.3-c45";
reg = <0>;
- reset-gpios = <&tlmm 59 GPIO_ACTIVE_LOW>;
+ reset-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
firmware-name = "marvell/AQR-G4_v5.4.C-AQR_CIG_WF-1945_0x0_ID44778_VER1630.cld";
};
aqr113c_8: ethernet-phy@8 {
compatible ="ethernet-phy-ieee802.3-c45";
reg = <8>;
- reset-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
+ reset-gpios = <&tlmm 59 GPIO_ACTIVE_LOW>;
firmware-name = "marvell/AQR-G4_v5.4.C-AQR_CIG_WF-1945_0x8_ID44776_VER1630.cld";
};