diff options
| author | Rosen Penev <rosenp@gmail.com> | 2023-12-01 16:52:27 -0800 |
|---|---|---|
| committer | Christian Marangi <ansuelsmth@gmail.com> | 2023-12-09 16:50:49 +0100 |
| commit | 81116ddb9be187b64b8de0cd4bb40180846fe9b6 (patch) | |
| tree | ca52edc5590ff63c6dd3cbdb9a894a7517eaecbd | |
| parent | 682f8fe7e7e4e921e2064d262b2a5480b81136eb (diff) | |
ipq806x: reset-gpio to reset-gpios
The former is deprecated. Fixes dtc warning.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
5 files changed, 11 insertions, 11 deletions
diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-d7800.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-d7800.dts index 18563c19f7..3cd1bd2045 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-d7800.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-d7800.dts @@ -195,7 +195,7 @@ &pcie0 { status = "okay"; - reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>; + reset-gpios = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>; pinctrl-0 = <&pcie0_pins>; pinctrl-names = "default"; @@ -217,7 +217,7 @@ &pcie1 { status = "okay"; - reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>; + reset-gpios = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>; pinctrl-0 = <&pcie1_pins>; pinctrl-names = "default"; max-link-speed = <1>; @@ -240,7 +240,7 @@ &pcie2 { status = "okay"; - reset-gpio = <&qcom_pinmux 63 GPIO_ACTIVE_HIGH>; + reset-gpios = <&qcom_pinmux 63 GPIO_ACTIVE_HIGH>; pinctrl-0 = <&pcie2_pins>; pinctrl-names = "default"; }; diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts index 47f653ac76..88c0daab40 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts @@ -199,7 +199,7 @@ &pcie0 { status = "okay"; - reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_LOW>; + reset-gpios = <&qcom_pinmux 3 GPIO_ACTIVE_LOW>; pinctrl-0 = <&pcie0_pins>; pinctrl-names = "default"; @@ -221,7 +221,7 @@ &pcie1 { status = "okay"; - reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_LOW>; + reset-gpios = <&qcom_pinmux 48 GPIO_ACTIVE_LOW>; pinctrl-0 = <&pcie1_pins>; pinctrl-names = "default"; max-link-speed = <1>; diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts index 693e14c120..db5acd47d7 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts @@ -226,14 +226,14 @@ &pcie0 { status = "okay"; - reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_LOW>; + reset-gpios = <&qcom_pinmux 3 GPIO_ACTIVE_LOW>; pinctrl-0 = <&pcie0_pins>; pinctrl-names = "default"; }; &pcie1 { status = "okay"; - reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_LOW>; + reset-gpios = <&qcom_pinmux 48 GPIO_ACTIVE_LOW>; pinctrl-0 = <&pcie1_pins>; pinctrl-names = "default"; max-link-speed = <1>; diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts index 3f5e807591..12f15bd147 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts @@ -557,7 +557,7 @@ &pcie0 { status = "okay"; - reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>; + reset-gpios = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>; pinctrl-0 = <&pcie0_pins>; pinctrl-names = "default"; @@ -579,7 +579,7 @@ &pcie1 { status = "okay"; - reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>; + reset-gpios = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>; pinctrl-0 = <&pcie1_pins>; pinctrl-names = "default"; max-link-speed = <1>; diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-tr4400-v2.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-tr4400-v2.dts index 7679f28eef..07a7b531c8 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-tr4400-v2.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-tr4400-v2.dts @@ -467,7 +467,7 @@ &pcie0 { status = "okay"; - reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>; + reset-gpios = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>; pinctrl-0 = <&pcie0_pins>; pinctrl-names = "default"; @@ -489,7 +489,7 @@ &pcie1 { status = "okay"; - reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>; + reset-gpios = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>; pinctrl-0 = <&pcie1_pins>; pinctrl-names = "default"; max-link-speed = <1>; |