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Diffstat (limited to 'EASTL/include/EASTL/internal/atomic/compiler/compiler_fetch_xor.h')
-rw-r--r--EASTL/include/EASTL/internal/atomic/compiler/compiler_fetch_xor.h173
1 files changed, 173 insertions, 0 deletions
diff --git a/EASTL/include/EASTL/internal/atomic/compiler/compiler_fetch_xor.h b/EASTL/include/EASTL/internal/atomic/compiler/compiler_fetch_xor.h
new file mode 100644
index 0000000..10cf7d9
--- /dev/null
+++ b/EASTL/include/EASTL/internal/atomic/compiler/compiler_fetch_xor.h
@@ -0,0 +1,173 @@
+/////////////////////////////////////////////////////////////////////////////////
+// Copyright (c) Electronic Arts Inc. All rights reserved.
+/////////////////////////////////////////////////////////////////////////////////
+
+
+#ifndef EASTL_ATOMIC_INTERNAL_COMPILER_FETCH_XOR_H
+#define EASTL_ATOMIC_INTERNAL_COMPILER_FETCH_XOR_H
+
+#if defined(EA_PRAGMA_ONCE_SUPPORTED)
+ #pragma once
+#endif
+
+
+/////////////////////////////////////////////////////////////////////////////////
+//
+// void EASTL_COMPILER_ATOMIC_FETCH_XOR_*_N(type, type ret, type * ptr, type val)
+//
+#if defined(EASTL_COMPILER_ATOMIC_FETCH_XOR_RELAXED_8)
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_RELAXED_8_AVAILABLE 1
+#else
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_RELAXED_8_AVAILABLE 0
+#endif
+
+#if defined(EASTL_COMPILER_ATOMIC_FETCH_XOR_ACQUIRE_8)
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_ACQUIRE_8_AVAILABLE 1
+#else
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_ACQUIRE_8_AVAILABLE 0
+#endif
+
+#if defined(EASTL_COMPILER_ATOMIC_FETCH_XOR_RELEASE_8)
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_RELEASE_8_AVAILABLE 1
+#else
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_RELEASE_8_AVAILABLE 0
+#endif
+
+#if defined(EASTL_COMPILER_ATOMIC_FETCH_XOR_ACQ_REL_8)
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_ACQ_REL_8_AVAILABLE 1
+#else
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_ACQ_REL_8_AVAILABLE 0
+#endif
+
+#if defined(EASTL_COMPILER_ATOMIC_FETCH_XOR_SEQ_CST_8)
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_SEQ_CST_8_AVAILABLE 1
+#else
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_SEQ_CST_8_AVAILABLE 0
+#endif
+
+
+#if defined(EASTL_COMPILER_ATOMIC_FETCH_XOR_RELAXED_16)
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_RELAXED_16_AVAILABLE 1
+#else
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_RELAXED_16_AVAILABLE 0
+#endif
+
+#if defined(EASTL_COMPILER_ATOMIC_FETCH_XOR_ACQUIRE_16)
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_ACQUIRE_16_AVAILABLE 1
+#else
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_ACQUIRE_16_AVAILABLE 0
+#endif
+
+#if defined(EASTL_COMPILER_ATOMIC_FETCH_XOR_RELEASE_16)
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_RELEASE_16_AVAILABLE 1
+#else
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_RELEASE_16_AVAILABLE 0
+#endif
+
+#if defined(EASTL_COMPILER_ATOMIC_FETCH_XOR_ACQ_REL_16)
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_ACQ_REL_16_AVAILABLE 1
+#else
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_ACQ_REL_16_AVAILABLE 0
+#endif
+
+#if defined(EASTL_COMPILER_ATOMIC_FETCH_XOR_SEQ_CST_16)
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_SEQ_CST_16_AVAILABLE 1
+#else
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_SEQ_CST_16_AVAILABLE 0
+#endif
+
+
+#if defined(EASTL_COMPILER_ATOMIC_FETCH_XOR_RELAXED_32)
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_RELAXED_32_AVAILABLE 1
+#else
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_RELAXED_32_AVAILABLE 0
+#endif
+
+#if defined(EASTL_COMPILER_ATOMIC_FETCH_XOR_ACQUIRE_32)
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_ACQUIRE_32_AVAILABLE 1
+#else
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_ACQUIRE_32_AVAILABLE 0
+#endif
+
+#if defined(EASTL_COMPILER_ATOMIC_FETCH_XOR_RELEASE_32)
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_RELEASE_32_AVAILABLE 1
+#else
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_RELEASE_32_AVAILABLE 0
+#endif
+
+#if defined(EASTL_COMPILER_ATOMIC_FETCH_XOR_ACQ_REL_32)
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_ACQ_REL_32_AVAILABLE 1
+#else
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_ACQ_REL_32_AVAILABLE 0
+#endif
+
+#if defined(EASTL_COMPILER_ATOMIC_FETCH_XOR_SEQ_CST_32)
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_SEQ_CST_32_AVAILABLE 1
+#else
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_SEQ_CST_32_AVAILABLE 0
+#endif
+
+
+#if defined(EASTL_COMPILER_ATOMIC_FETCH_XOR_RELAXED_64)
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_RELAXED_64_AVAILABLE 1
+#else
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_RELAXED_64_AVAILABLE 0
+#endif
+
+#if defined(EASTL_COMPILER_ATOMIC_FETCH_XOR_ACQUIRE_64)
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_ACQUIRE_64_AVAILABLE 1
+#else
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_ACQUIRE_64_AVAILABLE 0
+#endif
+
+#if defined(EASTL_COMPILER_ATOMIC_FETCH_XOR_RELEASE_64)
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_RELEASE_64_AVAILABLE 1
+#else
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_RELEASE_64_AVAILABLE 0
+#endif
+
+#if defined(EASTL_COMPILER_ATOMIC_FETCH_XOR_ACQ_REL_64)
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_ACQ_REL_64_AVAILABLE 1
+#else
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_ACQ_REL_64_AVAILABLE 0
+#endif
+
+#if defined(EASTL_COMPILER_ATOMIC_FETCH_XOR_SEQ_CST_64)
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_SEQ_CST_64_AVAILABLE 1
+#else
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_SEQ_CST_64_AVAILABLE 0
+#endif
+
+
+#if defined(EASTL_COMPILER_ATOMIC_FETCH_XOR_RELAXED_128)
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_RELAXED_128_AVAILABLE 1
+#else
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_RELAXED_128_AVAILABLE 0
+#endif
+
+#if defined(EASTL_COMPILER_ATOMIC_FETCH_XOR_ACQUIRE_128)
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_ACQUIRE_128_AVAILABLE 1
+#else
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_ACQUIRE_128_AVAILABLE 0
+#endif
+
+#if defined(EASTL_COMPILER_ATOMIC_FETCH_XOR_RELEASE_128)
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_RELEASE_128_AVAILABLE 1
+#else
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_RELEASE_128_AVAILABLE 0
+#endif
+
+#if defined(EASTL_COMPILER_ATOMIC_FETCH_XOR_ACQ_REL_128)
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_ACQ_REL_128_AVAILABLE 1
+#else
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_ACQ_REL_128_AVAILABLE 0
+#endif
+
+#if defined(EASTL_COMPILER_ATOMIC_FETCH_XOR_SEQ_CST_128)
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_SEQ_CST_128_AVAILABLE 1
+#else
+ #define EASTL_COMPILER_ATOMIC_FETCH_XOR_SEQ_CST_128_AVAILABLE 0
+#endif
+
+
+#endif /* EASTL_ATOMIC_INTERNAL_COMPILER_FETCH_XOR_H */