// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /dts-v1/; #include "ipq8074.dtsi" #include "ipq8074-hk-cpu.dtsi" #include "ipq8074-ess.dtsi" #include #include #include / { model = "Buffalo WXR-5950AX12"; compatible = "buffalo,wxr-5950ax12", "qcom,ipq8074"; aliases { serial0 = &blsp1_uart5; led-boot = &led_power_white; led-failsafe = &led_power_red; led-running = &led_power_white; led-upgrade = &led_power_white; label-mac-device = &dp5_syn; }; chosen { stdout-path = "serial0:115200n8"; bootargs-append = " ubi.mtd=user_property root=/dev/ubiblock1_0"; }; leds { compatible = "gpio-leds"; led-0 { gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>; color = ; function = "router"; }; led-1 { gpios = <&tlmm 22 GPIO_ACTIVE_HIGH>; color = ; function = "router"; }; led_power_red: led-2 { gpios = <&tlmm 31 GPIO_ACTIVE_HIGH>; color = ; function = LED_FUNCTION_POWER; }; led_power_white: led-3 { gpios = <&tlmm 34 GPIO_ACTIVE_HIGH>; color = ; function = LED_FUNCTION_POWER; }; led-4 { gpios = <&tlmm 43 GPIO_ACTIVE_HIGH>; color = ; function = "internet"; }; led-5 { gpios = <&tlmm 44 GPIO_ACTIVE_HIGH>; color = ; function = "internet"; }; led-6 { gpios = <&tlmm 55 GPIO_ACTIVE_HIGH>; color = ; function = LED_FUNCTION_WLAN; }; led-7 { gpios = <&tlmm 56 GPIO_ACTIVE_HIGH>; color = ; function = LED_FUNCTION_WLAN; }; }; keys { compatible = "gpio-keys"; /* * mode: 3x position switch * * - ROUTER * - AP * - WB (Wireless Bridge) */ ap { label = "mode-ap"; gpios = <&tlmm 29 GPIO_ACTIVE_LOW>; linux,code = ; }; bridge { label = "mode-wb"; gpios = <&tlmm 30 GPIO_ACTIVE_LOW>; linux,code = ; }; /* * op: 2x position switch * * - AUTO * - MANUAL (select Router/AP/WB manually) */ manual { label = "op-manual"; gpios = <&tlmm 52 GPIO_ACTIVE_LOW>; linux,code = ; }; wps { label = "wps"; gpios = <&tlmm 51 GPIO_ACTIVE_LOW>; linux,code = ; }; reset { label = "reset"; gpios = <&tlmm 54 GPIO_ACTIVE_LOW>; linux,code = ; }; }; reg_usb_vbus: regulator-5v-vbus { compatible = "regulator-fixed"; regulator-name = "vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; gpio = <&tlmm 64 GPIO_ACTIVE_HIGH>; enable-active-high; regulator-always-on; }; }; &tlmm { mdio_pins: mdio-pins { mdc { pins = "gpio68"; function = "mdc"; drive-strength = <8>; bias-pull-up; }; mdio { pins = "gpio69"; function = "mdio"; drive-strength = <8>; bias-pull-up; }; }; }; &blsp1_uart5 { status = "okay"; }; &prng { status = "okay"; }; &cryptobam { status = "okay"; }; &crypto { status = "okay"; }; &qpic_bam { status = "okay"; }; &qpic_nand { status = "okay"; nand@0 { reg = <0>; nand-ecc-strength = <4>; nand-ecc-step-size = <512>; nand-bus-width = <8>; partitions { compatible = "qcom,smem-part"; partition-0-appsblenv { compatible = "fixed-partitions"; label = "0:appsblenv"; read-only; #address-cells = <1>; #size-cells = <1>; partition@0 { compatible = "u-boot,env"; label = "env-data"; reg = <0x0 0x40000>; macaddr_appsblenv_ethaddr: ethaddr { }; }; }; }; }; }; &mdio { status = "okay"; pinctrl-0 = <&mdio_pins>; pinctrl-names = "default"; /* * RESET pins of phy chips * * WXR-5950AX12 has 2x RESET pins for QCA8075 and AQR113C. * The pin of QCA8075 is for the chip and not phys in the chip, the * pin of AQR113C is for 2x chips. So both pins are not appropriate * to declare them as reset-gpios in phy nodes. * Multiple entries in reset-gpios of mdio may not be supported, but * leave the following as-is to show that the those reset pin exists. */ reset-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>, /* QCA8075 RESET */ <&tlmm 63 GPIO_ACTIVE_LOW>; /* AQR113C RESET (2x) */ aqr113c_1: ethernet-phy@0 { compatible = "ethernet-phy-ieee802.3-c45"; reg = <0x0>; }; aqr113c_2: ethernet-phy@8 { compatible = "ethernet-phy-ieee802.3-c45"; reg = <0x8>; }; ethernet-phy-package@17 { #address-cells = <1>; #size-cells = <0>; compatible = "qcom,qca8075-package"; reg = <0x18>; qcom,package-mode = "qsgmii"; qca8075_1: ethernet-phy@19 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <0x19>; }; qca8075_2: ethernet-phy@1a { compatible = "ethernet-phy-ieee802.3-c22"; reg = <0x1a>; }; qca8075_3: ethernet-phy@1b { compatible = "ethernet-phy-ieee802.3-c22"; reg = <0x1b>; }; }; }; &switch { status = "okay"; switch_lan_bmp = <(ESS_PORT2 | ESS_PORT3 | ESS_PORT4 | ESS_PORT6)>; switch_wan_bmp = ; switch_mac_mode = ; switch_mac_mode1 = ; switch_mac_mode2 = ; qcom,port_phyinfo { port@2 { port_id = <2>; phy_address = <0x19>; }; port@3 { port_id = <3>; phy_address = <0x1a>; }; port@4 { port_id = <4>; phy_address = <0x1b>; }; port@5 { port_id = <5>; ethernet-phy-ieee802.3-c45; phy_address = <0x0>; }; port@6 { port_id = <6>; ethernet-phy-ieee802.3-c45; phy_address = <0x8>; }; }; }; &edma { status = "okay"; }; &dp2 { status = "okay"; phy-mode = "qsgmii"; phy-handle = <&qca8075_1>; label = "lan4"; nvmem-cells = <&macaddr_appsblenv_ethaddr>; nvmem-cell-names = "mac-address"; }; &dp3 { status = "okay"; phy-mode = "qsgmii"; phy-handle = <&qca8075_2>; label = "lan3"; nvmem-cells = <&macaddr_appsblenv_ethaddr>; nvmem-cell-names = "mac-address"; }; &dp4 { status = "okay"; phy-mode = "qsgmii"; phy-handle = <&qca8075_3>; label = "lan2"; nvmem-cells = <&macaddr_appsblenv_ethaddr>; nvmem-cell-names = "mac-address"; }; &dp5_syn { status = "okay"; phy-mode = "usxgmii"; phy-handle = <&aqr113c_1>; label = "wan"; nvmem-cells = <&macaddr_appsblenv_ethaddr>; nvmem-cell-names = "mac-address"; }; &dp6_syn { status = "okay"; phy-mode = "usxgmii"; phy-handle = <&aqr113c_2>; label = "lan1"; nvmem-cells = <&macaddr_appsblenv_ethaddr>; nvmem-cell-names = "mac-address"; }; &ssphy_0 { status = "okay"; }; &qusb_phy_0 { status = "okay"; }; &usb_0 { status = "okay"; vbus-supply = <®_usb_vbus>; }; &wifi { status = "okay"; qcom,ath11k-calibration-variant = "Buffalo-WXR-5950AX12"; };