// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /dts-v1/; #include #include #include #include "mt7981b.dtsi" / { aliases { led-boot = &led_status_red; led-failsafe = &led_status_red; led-running = &led_status_green; led-upgrade = &led_status_green; serial0 = &uart0; }; chosen { stdout-path = "serial0:115200n8"; }; gpio-keys { compatible = "gpio-keys"; reset { label = "reset"; linux,code = ; gpios = <&pio 1 GPIO_ACTIVE_LOW>; debounce-interval = <60>; }; wps { label = "wps"; linux,code = ; gpios = <&pio 0 GPIO_ACTIVE_LOW>; debounce-interval = <60>; }; }; leds { compatible = "gpio-leds"; led_status_green: green { color = ; function = LED_FUNCTION_STATUS; gpios = <&pio 11 GPIO_ACTIVE_LOW>; }; led_status_red: red { color = ; function = LED_FUNCTION_STATUS; gpios = <&pio 12 GPIO_ACTIVE_LOW>; }; }; memory@40000000 { reg = <0 0x40000000 0 0x10000000>; device_type = "memory"; }; }; ð { status = "okay"; gmac0: mac@0 { compatible = "mediatek,eth-mac"; reg = <0>; phy-mode = "2500base-x"; nvmem-cell-names = "mac-address"; nvmem-cells = <&macaddr_factory_24 0>; fixed-link { speed = <2500>; full-duplex; pause; }; }; gmac1: mac@1 { compatible = "mediatek,eth-mac"; reg = <1>; label = "wan"; phy-mode = "gmii"; phy-handle = <&int_gbe_phy>; nvmem-cell-names = "mac-address"; nvmem-cells = <&macaddr_factory_2a 0>; }; }; &mdio_bus { switch: switch@1f { compatible = "mediatek,mt7531"; reg = <31>; reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>; interrupt-controller; #interrupt-cells = <1>; interrupt-parent = <&pio>; interrupts = <38 IRQ_TYPE_LEVEL_HIGH>; }; }; &spi0 { pinctrl-names = "default"; pinctrl-0 = <&spi0_flash_pins>; status = "okay"; spi_nand@0 { #address-cells = <1>; #size-cells = <1>; compatible = "spi-nand"; reg = <0>; spi-max-frequency = <52000000>; spi-tx-bus-width = <4>; spi-rx-bus-width = <4>; spi-cal-enable; spi-cal-mode = "read-data"; spi-cal-datalen = <7>; spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4e 0x41 0x4e 0x44>; spi-cal-addrlen = <5>; spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>; mediatek,nmbm; mediatek,bmt-max-ratio = <1>; mediatek,bmt-max-reserved-blocks = <64>; partitions: partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; partition@0 { label = "BL2"; reg = <0x0 0x100000>; read-only; }; partition@100000 { label = "u-boot-env"; reg = <0x100000 0x80000>; }; partition@180000 { label = "Factory"; reg = <0x180000 0x200000>; read-only; nvmem-layout { compatible = "fixed-layout"; #address-cells = <1>; #size-cells = <1>; eeprom_factory_0: eeprom@0 { reg = <0x0 0x1000>; }; macaddr_factory_4: macaddr@4 { reg = <0x4 0x6>; compatible = "mac-base"; #nvmem-cell-cells = <1>; }; macaddr_factory_24: macaddr@24 { compatible = "mac-base"; reg = <0x24 0x6>; #nvmem-cell-cells = <1>; }; macaddr_factory_2a: macaddr@2a { compatible = "mac-base"; reg = <0x2a 0x6>; #nvmem-cell-cells = <1>; }; }; }; partition@380000 { label = "FIP"; reg = <0x380000 0x200000>; read-only; }; }; }; }; &switch { ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; label = "lan1"; }; port@1 { reg = <1>; label = "lan2"; }; port@2 { reg = <2>; label = "lan3"; }; port@6 { reg = <6>; ethernet = <&gmac0>; phy-mode = "2500base-x"; fixed-link { speed = <2500>; full-duplex; pause; }; }; }; }; &pio { spi0_flash_pins: spi0-pins { mux { function = "spi"; groups = "spi0", "spi0_wp_hold"; }; conf-pu { pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP"; drive-strength = ; bias-pull-up = ; }; conf-pd { pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO"; drive-strength = ; bias-pull-down = ; }; }; }; &uart0 { status = "okay"; }; &watchdog { status = "okay"; }; &wifi { #address-cells = <1>; #size-cells = <0>; nvmem-cells = <&eeprom_factory_0>; nvmem-cell-names = "eeprom"; status = "okay"; band@0 { reg = <0>; nvmem-cells = <&macaddr_factory_4 0>; nvmem-cell-names = "mac-address"; }; band@1 { reg = <1>; nvmem-cells = <&macaddr_factory_4 1>; nvmem-cell-names = "mac-address"; }; };