// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

/dts-v1/;
#include <dt-bindings/leds/common.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

#include "mt7981b.dtsi"

/ {
	model = "Teltonika RUTC50";
	compatible = "teltonika,rutc50", "mediatek,mt7981";

	aliases {
		serial0 = &uart0;
		label-mac-device = &gmac0;
		led-boot = &power;
		led-failsafe = &power;
		led-running = &power;
		led-upgrade = &power;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	memory@40000000 {
		reg = <0 0x40000000 0 0x10000000>;
		device_type = "memory";
	};

	gpio-keys {
		compatible = "gpio-keys";

		reset {
			label = "reset";
			linux,code = <KEY_RESTART>;
			gpios = <&pio 6 GPIO_ACTIVE_LOW>;
			debounce-interval = <60>;
		};
	};

	gpio-export {
		compatible = "gpio-export";

		gpio_pcie_reset {
			gpio-export,name = "pcie_reset";
			gpio-export,output = <1>;
			gpios = <&pio 3 GPIO_ACTIVE_LOW>;
		};

		gpio_modem_power {
			gpio-export,name = "modem_power";
			gpio-export,output = <0>;
			gpios = <&pio 9 GPIO_ACTIVE_HIGH>;
		};

		gpio_modem_reset {
			gpio-export,name = "modem_reset";
			gpio-export,output = <0>;
			gpios = <&pio 10 GPIO_ACTIVE_HIGH>;
		};

		gpio_modem_status {
			gpio-export,name = "modem_status";
			gpio-export,input = <0>;
			gpios = <&pio 11 GPIO_ACTIVE_LOW>;
		};

		gpio_digital_input {
			gpio-export,name = "digital_input";
			gpio-export,input = <0>;
			gpios = <&pio 12 GPIO_ACTIVE_HIGH>;
		};

		gpio_digital_output {
			gpio-export,name = "digital_output";
			gpio-export,output = <0>;
			gpios = <&pio 35 GPIO_ACTIVE_HIGH>;
		};
	};

	leds {
		compatible = "gpio-leds";

		power: power {
			function = LED_FUNCTION_POWER;
			color = <LED_COLOR_ID_GREEN>;
			gpios = <&pio 15 GPIO_ACTIVE_LOW>;
		};

		wan_eth {
			function = "wan-eth";
			color = <LED_COLOR_ID_GREEN>;
			gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
		};

		wan_wifi {
			function = "wan-wifi";
			color = <LED_COLOR_ID_GREEN>;
			gpios = <&pio 1 GPIO_ACTIVE_HIGH>;
		};

		wan_sim1 {
			function = "wan-sim1";
			color = <LED_COLOR_ID_GREEN>;
			gpios = <&gpio_hc595 0 GPIO_ACTIVE_HIGH>;
		};

		wan_sim2 {
			function = "wan-sim2";
			color = <LED_COLOR_ID_GREEN>;
			gpios = <&gpio_hc595 7 GPIO_ACTIVE_HIGH>;
		};

		wifi_2g {
			function = LED_FUNCTION_WLAN_2GHZ;
			color = <LED_COLOR_ID_GREEN>;
			gpios = <&pio 14 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "phy0tpt";
		};

		wifi_5g {
			function = LED_FUNCTION_WLAN_5GHZ;
			color = <LED_COLOR_ID_GREEN>;
			gpios = <&pio 5 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "phy1tpt";
		};

		3G {
			function = "3G";
			color = <LED_COLOR_ID_GREEN>;
			gpios = <&gpio_hc595 6 GPIO_ACTIVE_HIGH>;
		};

		4G {
			function = "4G";
			color = <LED_COLOR_ID_GREEN>;
			gpios = <&gpio_hc595 5 GPIO_ACTIVE_HIGH>;
		};

		5G {
			function = "5G";
			color = <LED_COLOR_ID_GREEN>;
			gpios = <&gpio_hc595 4 GPIO_ACTIVE_HIGH>;
		};

		rssi1 {
			function = "rssi-1";
			color = <LED_COLOR_ID_GREEN>;
			gpios = <&gpio_hc595 3 GPIO_ACTIVE_HIGH>;
		};

		rssi2 {
			function = "rssi-2";
			color = <LED_COLOR_ID_GREEN>;
			gpios = <&gpio_hc595 2 GPIO_ACTIVE_HIGH>;
		};

		rssi3 {
			function = "rssi-3";
			color = <LED_COLOR_ID_GREEN>;
			gpios = <&gpio_hc595 1 GPIO_ACTIVE_HIGH>;
		};
	};

	watchdog {
		compatible = "linux,wdt-gpio";
		gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
		hw_algo = "toggle";
		hw_margin_ms = <1000>;
	};
};

&eth {
	pinctrl-names = "default";
	pinctrl-0 = <&gbe_led0_pins>, <&gbe_led1_pins>;
	status = "okay";

	gmac0: mac@0 {
		compatible = "mediatek,eth-mac";
		reg = <0>;
		phy-mode = "2500base-x";
		nvmem-cells = <&macaddr_config_0 0>;
		nvmem-cell-names = "mac-address";

		fixed-link {
			speed = <2500>;
			full-duplex;
			pause;
		};
	};

	gmac1: mac@1 {
		compatible = "mediatek,eth-mac";
		reg = <1>;
		label = "wan";
		phy-mode = "gmii";
		phy-handle = <&int_gbe_phy>;
		nvmem-cells = <&macaddr_config_0 1>;
		nvmem-cell-names = "mac-address";
	};
};

&int_gbe_phy_led0{
	function = LED_FUNCTION_WAN;
	color = <LED_COLOR_ID_AMBER>;
	status = "okay";
};

&int_gbe_phy_led1{
	function = LED_FUNCTION_WAN;
	color = <LED_COLOR_ID_GREEN>;
	status = "okay";
};

&mdio_bus {
	switch: switch@1f {
		compatible = "mediatek,mt7531";
		reg = <31>;
		reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
		interrupt-controller;
		#interrupt-cells = <1>;
		interrupt-parent = <&pio>;
		interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				phy-handle = <&swphy0>;
				label = "lan4";
			};

			port@1 {
				reg = <1>;
				phy-handle = <&swphy1>;
				label = "lan3";
			};

			port@2 {
				reg = <2>;
				phy-handle = <&swphy2>;
				label = "lan2";
			};

			port@3 {
				reg = <3>;
				phy-handle = <&swphy3>;
				label = "lan1";
			};

			port@6 {
				reg = <6>;
				label = "cpu";
				ethernet = <&gmac0>;
				phy-mode = "2500base-x";

				fixed-link {
					speed = <2500>;
					full-duplex;
					pause;
				};
			};
		};

		mdio {
			#address-cells = <1>;
			#size-cells = <0>;

			swphy0: phy@0 {
				reg = <0>;

				mediatek,led-config = <
					0x21 0x8009 /* BASIC_CTRL */
					0x22 0x0c00 /* ON_DURATION */
					0x23 0x1400 /* BLINK_DURATION */
					0x24 0xc001 /* LED0_ON_CTRL */
					0x25 0x0003 /* LED0_BLINK_CTRL */
					0x26 0xc006 /* LED1_ON_CTRL */
					0x27 0x003c /* LED1_BLINK_CTRL */
				>;
			};

			swphy1: phy@1 {
				reg = <1>;
			};

			swphy2: phy@2 {
				reg = <2>;
			};

			swphy3: phy@3 {
				reg = <3>;
			};
		};
	};
};

&spi0 {
	pinctrl-names = "default";
	pinctrl-0 = <&spi0_flash_pins>;
	status = "okay";

	spi_nand@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "spi-nand";
		reg = <0>;

		spi-max-frequency = <52000000>;
		spi-tx-buswidth = <4>;
		spi-rx-buswidth = <4>;

		mediatek,nmbm;
		mediatek,bmt-max-ratio = <1>;
		mediatek,bmt-max-reserved-blocks = <64>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "rutos-a";
				reg = <0x00000000 0x10000000>;
			};

			partition@10000000 {
				label = "rutos-b";
				reg = <0x10000000 0x10000000>;
			};
		};
	};
};

&spi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&spic_pins>;
	status = "okay";

	gpio_hc595: gpio_hc595@0 {
		compatible = "fairchild,74hc595";
		reg = <0>;
		gpio-controller;
		#gpio-cells = <2>;
		registers-number = <1>;
		spi-max-frequency = <10000000>;
		enable-gpios = <&pio 4 GPIO_ACTIVE_LOW>;
	};
};

&spi2 {
	pinctrl-names = "default";
	pinctrl-0 = <&spi2_flash_pins>;
	status = "okay";

	flash@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "jedec,spi-nor";
		reg = <0>;

		spi-max-frequency = <4000000>;
		spi-tx-buswidth = <4>;
		spi-rx-buswidth = <4>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@00000 {
				label = "bl2";
				reg = <0x00000 0x0040000>;
				read-only;
			};

			partition@40000 {
				label = "u-boot-env";
				reg = <0x40000 0x0010000>;
			};

			factory: partition@50000 {
				label = "factory";
				reg = <0x50000 0x00A0000>;
				read-only;

				nvmem-layout {
					compatible = "fixed-layout";
					#address-cells = <1>;
					#size-cells = <1>;

					eeprom_factory_0: eeprom@0 {
						reg = <0x0 0x1000>;
					};
				};
			};

			config: partition@f0000	{
				compatible = "nvmem-cells";
				#address-cells = <1>;
				#size-cells = <1>;

				label = "config";
				reg = <0xF0000 0x0010000>;
				read-only;

				nvmem-layout {
					compatible = "fixed-layout";
					#address-cells = <1>;
					#size-cells = <1>;

					macaddr_config_0: macaddr@0 {
						compatible = "mac-base";
						reg = <0x0 0x6>;
						#nvmem-cell-cells = <1>;
					};
				};
			};

			boot: partition@100000 {
				label = "fip";
				reg = <0x100000 0x0100000>;
				read-only;
			};

			partition@200000 {
				label = "bootconfig-a";
				reg = <0x200000 0x010000>;
			};

			partition@210000 {
				label = "bootconfig-b";
				reg = <0x210000 0x010000>;
			};

			partition@220000 {
				label = "event-log";
				reg = <0x220000 0x090000>;
			};

			partition@2B0000 {
				label = "recovery";
				reg = <0x2B0000 0xD50000>;
			};
		};
	};
};

&pio {
	spi0_flash_pins: spi0-pins {
		mux {
			function = "spi";
			groups = "spi0", "spi0_wp_hold";
		};

		conf-pu {
			pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
			drive-strength = <MTK_DRIVE_4mA>;
			bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
		};

		conf-pd {
			pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
			drive-strength = <MTK_DRIVE_4mA>;
			bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
		};
	};

	spic_pins: spi1-pins {
		mux {
			function = "spi";
			groups = "spi1_1";
		};
	};

	spi2_flash_pins: spi2-pins {
		mux {
			function = "spi";
			groups = "spi2", "spi2_wp_hold";
		};

		conf-pu {
			pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
			drive-strength = <MTK_DRIVE_8mA>;
			bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
		};

		conf-pd {
			pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
			drive-strength = <MTK_DRIVE_8mA>;
			bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
		};
	};
};

&uart0 {
	status = "okay";
};

&watchdog {
	status = "okay";
};

&usb_phy {
	status = "okay";
};

&xhci {
	status = "okay";
};

&wifi {
	#address-cells = <1>;
	#size-cells = <0>;

	status = "okay";
	nvmem-cells = <&eeprom_factory_0>;
	nvmem-cell-names = "eeprom";

	band@0 {
		reg = <0>;
		nvmem-cells = <&macaddr_config_0 2>;
		nvmem-cell-names = "mac-address";
	};

	band@1 {
		reg = <1>;
		nvmem-cells = <&macaddr_config_0 3>;
		nvmem-cell-names = "mac-address";
	};
};