#include "qcom-ipq8064-v1.0.dtsi" / { model = "Qualcomm Technologies, Inc. IPQ8064/AP-148"; compatible = "qcom,ipq8064-ap148", "qcom,ipq8064"; memory@0 { reg = <0x42000000 0x1e000000>; device_type = "memory"; }; reserved-memory { #address-cells = <1>; #size-cells = <1>; ranges; rsvd@41200000 { reg = <0x41200000 0x300000>; no-map; }; }; aliases { mdio-gpio0 = &mdio0; }; }; &adm_dma { status = "okay"; }; &flash { partitions { compatible = "qcom,smem-part"; }; }; &hs_phy_0 { status = "okay"; }; &ss_phy_0 { status = "okay"; }; &usb3_0 { status = "okay"; }; &hs_phy_1 { status = "okay"; }; &ss_phy_1 { status = "okay"; }; &usb3_1 { status = "okay"; }; &pcie0 { status = "okay"; }; &pcie1 { status = "okay"; max-link-speed = <1>; }; &nand { status = "okay"; nand@0 { reg = <0>; compatible = "qcom,nandcs"; nand-ecc-strength = <4>; nand-bus-width = <8>; nand-ecc-step-size = <512>; partitions { compatible = "qcom,smem-part"; }; }; }; &mdio0 { status = "okay"; pinctrl-0 = <&mdio0_pins>; pinctrl-names = "default"; switch@10 { compatible = "qca,qca8337"; #address-cells = <1>; #size-cells = <0>; reg = <0x10>; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; label = "cpu"; ethernet = <&gmac1>; phy-mode = "rgmii"; tx-internal-delay-ps = <1000>; rx-internal-delay-ps = <1000>; fixed-link { speed = <1000>; full-duplex; }; }; port@1 { reg = <1>; label = "lan1"; phy-mode = "internal"; phy-handle = <&phy_port1>; }; port@2 { reg = <2>; label = "lan2"; phy-mode = "internal"; phy-handle = <&phy_port2>; }; port@3 { reg = <3>; label = "lan3"; phy-mode = "internal"; phy-handle = <&phy_port3>; }; port@4 { reg = <4>; label = "lan4"; phy-mode = "internal"; phy-handle = <&phy_port4>; }; port@5 { reg = <5>; label = "wan"; phy-mode = "internal"; phy-handle = <&phy_port5>; }; /* port@6 { reg = <0>; label = "cpu"; ethernet = <&gmac2>; phy-mode = "rgmii"; fixed-link { speed = <1000>; full-duplex; pause; asym-pause; }; }; */ }; mdio { #address-cells = <1>; #size-cells = <0>; phy_port1: phy@0 { reg = <0>; }; phy_port2: phy@1 { reg = <1>; }; phy_port3: phy@2 { reg = <2>; }; phy_port4: phy@3 { reg = <3>; }; phy_port5: phy@4 { reg = <4>; }; }; }; }; &gmac1 { status = "okay"; phy-mode = "rgmii"; qcom,id = <1>; pinctrl-0 = <&rgmii2_pins>; pinctrl-names = "default"; fixed-link { speed = <1000>; full-duplex; }; }; &gmac2 { status = "okay"; phy-mode = "sgmii"; qcom,id = <2>; fixed-link { speed = <1000>; full-duplex; }; };