From 758c88b969639d0e6b684669d2e54dd1be3102f4 Mon Sep 17 00:00:00 2001 From: Olliver Schinagl Date: Tue, 30 Aug 2022 21:25:25 +0200 Subject: realtek: Whitespace and codestyle cleanup Fix some ugly whitepsaces and codestyle issues around the realtek sources. While this is by no means perfect, it catches what it caught. Signed-off-by: Olliver Schinagl --- target/linux/realtek/files-5.15/arch/mips/kernel/cevt-rtl9300.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'target/linux/realtek/files-5.15/arch/mips/kernel/cevt-rtl9300.c') diff --git a/target/linux/realtek/files-5.15/arch/mips/kernel/cevt-rtl9300.c b/target/linux/realtek/files-5.15/arch/mips/kernel/cevt-rtl9300.c index 1c8c30de5d..447e754f20 100644 --- a/target/linux/realtek/files-5.15/arch/mips/kernel/cevt-rtl9300.c +++ b/target/linux/realtek/files-5.15/arch/mips/kernel/cevt-rtl9300.c @@ -11,7 +11,7 @@ #include -/* +/* * Timer registers * the RTL9300/9310 SoCs have 6 timers, each register block 0x10 apart */ @@ -59,6 +59,7 @@ static irqreturn_t rtl9300_timer_interrupt(int irq, void *dev_id) writel(v, rtl_clk->base + RTL9300_TC_INT); clk->event_handler(clk); + return IRQ_HANDLED; } @@ -101,6 +102,7 @@ static int rtl9300_state_periodic(struct clock_event_device *clk) rtl9300_clock_stop(base); writel(RTL9300_CLOCK_RATE / HZ, base + RTL9300_TC_DATA); rtl9300_timer_start(base, TIMER_MODE_REPEAT); + return 0; } @@ -112,6 +114,7 @@ static int rtl9300_state_oneshot(struct clock_event_device *clk) rtl9300_clock_stop(base); writel(RTL9300_CLOCK_RATE / HZ, base + RTL9300_TC_DATA); rtl9300_timer_start(base, TIMER_MODE_ONCE); + return 0; } @@ -121,6 +124,7 @@ static int rtl9300_shutdown(struct clock_event_device *clk) pr_debug("------------- rtl9300_shutdown %08x\n", (u32)base); rtl9300_clock_stop(base); + return 0; } -- cgit v1.2.3