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* mediatek: fix BPI-R3 wifi mac addressFelix Fietkau2024-01-09
| | | | | | | | Setting/clearing bits on the first byte of the mac address causes collisions when using multiple SSIDs on both PHYs. Change the allocation to alter the last byte instead. Signed-off-by: Felix Fietkau <nbd@nbd.name>
* mediatek: disable btif for mt7622 devicesFelix Fietkau2024-01-09
| | | | | | It breaks built-in SoC WLAN. Can be re-enabled after we've figured out the cause Signed-off-by: Felix Fietkau <nbd@nbd.name>
* mediatek: add support for YunCore AX835Leon M. Busch-George2024-01-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hardware specification: SoC: MediaTek MT7981B 2x A53 Flash: 16MB NOR RAM: 256MB Ethernet: 2x 10/100/1000 Mbps Switch: MediaTek MT7531AE WiFi: MediaTek MT7976C Button: Reset Power: DC 12V 1A, PoE 802.3af 48V Flash instructions: Option #1 - SSH I was able to SSH into the stock firmware of my device. 1. Attach the router to the network 2. Use scp (-O) to copy the sysupgrade image 3. Connect using SSH and run `sysupgrade -n` Option #2 - U-Boot One way to use the bootloader for flashing is using TFTP: 1. Connect to the router using an ethernet cable 2 Spin up a TFTP server serving the sysupgrade file 3. Open the case and attach a UART 4. Attach power to the router and interrupt the countdown by pressing any key 5. Select option #2 (Upgrade firmware) 6. Enter IP address information and image name 7. Wait patiently Co-Authored-By: Enrique Rodríguez Valencia <enrique.rodriguez@galgus.net> Co-Authored-By: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Leon M. Busch-George <leon@georgemail.eu>
* mediatek: GL-MT6000: Add missing LED state definitionsHannu Nyman2024-01-09
| | | | | | | | | | | | | | | | | | | | Adjust LED names and provide the OpenWrt status indicator aliases to actually use LEDs by the OpenWrt boot & sysupgrade processes. * Name both LEDs clearly by the color * Add the missing OpenWrt LED status indicator aliases and remove the now unnecessary default status from blue LED After this commit, the LEDs are used as: * bootloader, really early Linux boot: blue LED is on * preinit/failsafe: white LED blinks rapidly * late boot: white LED blinks slowly * boot completed, running normally: blue LED is on * sysupgrade: white LED blinks Signed-off-by: Hannu Nyman <hannu.nyman@iki.fi>
* kernel: backport more NVMEM changes queued for v6.8Rafał Miłecki2024-01-08
| | | | Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
* ath79: add support for UniFi UK-UltraDavid Bauer2024-01-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hardware -------- CPU: Qualcomm Atheros QCA9563 RAM: 128M DDR2 FLASH: 16MB SPI-NOR WiFi: Qualcomm Atheros QCA9563 2x2:2 802.11n 2.4GHz Qualcomm Atheros QCA9880 2x2:2 802.11ac 5GHz Antennas -------- The device features internal antennas as well as external antenna connectors. By default, the internal antennas are used. Two GPIOs are exported by name, which can be used to control the antenna-path mux. Writing a logical 0 enables the external antenna connectors. Installation ------------ 1. Download the OpenWrt sysupgrade image to the device. You can use scp for this task. The default username and password are "ubnt" and the device is reachable at 192.168.1.20. $ scp -O openwrt-sysupgrade.bin ubnt@192.168.1.20:/tmp/firmware.bin 2. Connect to the device using SSH. $ ssh ubnt@192.168.1.20 3. Disable the write-protect $ echo "5edfacbf" > /proc/ubnthal/.uf 4. Verify kernel0 and kernel1 match mtd2 and mtd3 $ cat /proc/mtd 5. Write the sysupgrade image to kernel0 and kernel1 $ dd if=/tmp/firmware.bin of=/dev/mtdblock2 $ dd if=/tmp/firmware.bin of=/dev/mtdblock3 6. Write the bootselect flag to boot from kernel0 $ dd if=/dev/zero bs=1 count=1 of=/dev/mtd4 7. Reboot the device $ reboot Signed-off-by: David Bauer <mail@david-bauer.net>
* ath79: move UniFi AC template into commonDavid Bauer2024-01-07
| | | | | | This allows us to embrace alphabetical sorting for the UK-Ultra. Signed-off-by: David Bauer <mail@david-bauer.net>
* ramips: add alternative name to Etisalat (Sercomm) S3Mikhail Zhilkin2024-01-07
| | | | | | This commit adds alternative name to Etisalat (Sercomm) S3 router. Signed-off-by: Mikhail Zhilkin <csharper2005@gmail.com>
* ramips: sercomm s1500: enable wlan LEDs activity blinkingMikhail Zhilkin2024-01-07
| | | | | | | | | This commit enables wireless LEDs activity blinking for Sercomm S1500 devices (Beeline Smartbox PRO, WiFire s1500.nbn). Run-tested: WiFire s1500.nbn Signed-off-by: Mikhail Zhilkin <csharper2005@gmail.com>
* ramips: update leds & buttons dts descriptionMikhail Zhilkin2024-01-07
| | | | | | | | | | | | | This commit: 1. Removes deprecated "label" property from the dts leds subnnodes; 2. Updates buttons and leds dts description according to kernel docs examples. Scope: devices well known to me. Run-tested: TP-Link ec330-g5u, WiFire S1500.nbn Signed-off-by: Mikhail Zhilkin <csharper2005@gmail.com>
* ath79: support MikroTik RouterBOARD 911G-5HPacDLech Perczak2024-01-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MikroTik RouterBOARD 911G-5HPacD is a stripped-down version of RB921GS-5HPacD, removing the SFP cage. This ports the board from ar71xx, and is based on support for RB921GS-5HPacD. Disable mdio1 and eth1 nodes in routerboard-92x.dtsi, then re-enable them in devices using that, so the newly-added device has the port disabled properly. See https://mikrotik.com/product/RB911G-5HPacD for more info. Specifications: - SoC: Qualcomm Atheros QCA9558 (720 MHz) - RAM: 128 MB - Storage: 128 MB NAND - Wireless: external QCA9892 802.11a/ac 2x2:2 - Ethernet: 1x 1000/100/10 Mbps, integrated, via AR8031 PHY, passive PoE in Working: - NAND storage detection - Ethernet - Wireless - 1x user LED (blinks during boot, sysupgrade) - Reset button - Sysupgrade Installation: - Boot initramfs image via TFTP and then flash sysupgrade image Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
* ath79: mikrotik: add rssileds support for Routerboard 911G and RB912UAGLech Perczak2024-01-07
| | | | | | | LEDs 1 through 5 are used for RSSI monitoring on factory firmware. Reflect that by creating appropriate rssileds configuration. Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
* ath79: support for MikroTik RouterBOARD 911G-(2,5)HPnDLech Perczak2024-01-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a stripped-down version of RB912UAG-(2,5)HPnD, without USB, miniPCIe and SIM sockets. This board has been supported in the ar71xx. Add support based on RB912UAG board, by splitting out the common part to .dtsi, and creating separate device tree for the stripped-down version. Links: * https://mikrotik.com/product/RB911G-2HPnD * https://mikrotik.com/product/RB911G-5HPnD * https://openwrt.org/toh/hwdata/mikrotik/mikrotik_rb911g-5hpnd Hardware: * SoC: Atheros AR9342, * RAM: DDR 64MB, * SPI NOR: 64KB, * NAND: 128MB, * Ethernet: x1 10/100/1000 port with passive POE in, * Wi-Fi: 802.11 a/b/g/n (depending on band variant) * LEDs: 5 general purpose LEDs (led1..led5), power LED, user LED, Ethernet phy LED, * Button, * Beeper. Flashing: * Use the RouterBOARD Reset button to enable TFTP netboot, boot kernel and initramfs and then perform sysupgrade. * From ar71xx OpenWrt firmware run: $ sysupgrade -F /tmp/<sysupgrade.bin> For more info see: https://openwrt.org/toh/mikrotik/common. Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
* ath79: mikrotik: add RB912UAG-5HPnD as alternative nameLech Perczak2024-01-07
| | | | | | | | | Image for RB912UAG-2HPnD supports the 5GHz variant without modifications. Add it as alternative name, so it can be found easier. While at that, adjust board display name in device tree, to reflect that. Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
* ramips: add missing syscon compatible strings for MT7688 and RT3052Shiji Yang2024-01-06
| | | | | | | | | | | | MT7688 devices use the "mt7628an.dtsi" as the template. And RT3052 devices use the "rt3050.dtsi" as template. Therefore, we need to add the corresponding system controller compatible strings to make them work properly. Fixes: 1f818b09f8ae ("ramips: add proper system clock and reset driver support for legacy SoCs") Fixes: #14305 Signed-off-by: Shiji Yang <yangshiji66@qq.com>
* qualcommax: Fix Buffalo WXR-5950AX12 wifi MACSamir Ibradžić2024-01-06
| | | | | | | | | | | | | | | | | | | | | Currently, WiFi interfaces on WXR-5950AX12 / WXR-6000AX12 devices come up with some MAC addresses inconsistent with vendor and Ethernet addresses. This adds a hotplug override in order to make it consistent with what is in u-boot env as well as OAM firmware where 1st radio MAC is set at Ethernet MAC + 8, and 2nd radio mac at Ethernet MAC + 16. fw_printenv | grep addr ethaddr=68:e1:dc:xx:xx:d8 ipaddr=192.168.11.1 wlan0addr=68:e1:dc:xx:xx:e0 wlan1addr=68:e1:dc:xx:xx:e8 wlan2addr=00:00:00:00:00:00 For OEM bootlog and MAC assagnment check https://openwrt.org/toh/buffalo/wxr-5950ax12#openwrt_uimage_tftp_bootlog Tested-by: Samir Ibradžić <sibradzic@gmail.com> # Buffalo WXR-6000AX12P Signed-off-by: Samir Ibradžić <sibradzic@gmail.com>
* mediatek: filogic: add support for Xiaomi AX3000TDim Fish2024-01-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | **SoC**: MediaTek MT7981B 2x A53 **Flash**: ESMT F50L1G41LB 128MB **RAM**: NT52B128M16JR-FL 256MB **Ethernet**: 4x 10/100/1000 Mbps **Switch**: MediaTek MT7531AE **WiFi**: MediaTek MT7976C **Buttons**: Reset, Mesh **Power**: DC 12V 1A 1. Get ssh access. Supported stock firmware **1.0.47** ``` curl -X POST "http://192.168.31.1/cgi-bin/luci/;stok=*******/api/misystem/arn_switch" -d "open=1&model=1&level=%0Anvram%20set%20ssh_en%3D1%0A" curl -X POST "http://192.168.31.1/cgi-bin/luci/;stok=*******/api/misystem/arn_switch" -d "open=1&model=1&level=%0Anvram%20commit%0A" curl -X POST "http://192.168.31.1/cgi-bin/luci/;stok=*******/api/misystem/arn_switch" -d "open=1&model=1&level=%0Ased%20-i%20's%2Fchannel%3D.*%2Fchannel%3D%22debug%22%2Fg'%20%2Fetc%2Finit.d%2Fdropbear%0A" curl -X POST "http://192.168.31.1/cgi-bin/luci/;stok=*******/api/misystem/arn_switch" -d "open=1&model=1&level=%0A%2Fetc%2Finit.d%2Fdropbear%20start%0A" curl -X POST "http://192.168.31.1/cgi-bin/luci/;stok=********/api/misystem/arn_switch" -d "open=1&model=1&level=%0Apasswd%20-d%20root%0A ``` 2. Backup stock partitions ``` nanddump -f /tmp/BL2.bin /dev/mtd1 nanddump -f /tmp/Nvram.bin /dev/mtd2 nanddump -f /tmp/Bdata.bin /dev/mtd3 nanddump -f /tmp/Factory.bin /dev/mtd4 nanddump -f /tmp/FIP.bin /dev/mtd5 nanddump -f /tmp/ubi.bin /dev/mtd8 nanddump -f /tmp/KF.bin /dev/mtd12 ``` Then transfer them to your computer in a safe place. 3. Get firmware information `cat /proc/cmdline` 4. Copy openwrt-mediatek-filogic-xiaomi_mi-router-ax3000t-initramfs-factory.ubi to **/tmp** and flash If **firmware=0** ``` ubiformat /dev/mtd9 -y -f /tmp/openwrt-mediatek-filogic-xiaomi_mi-router-ax3000t-initramfs-factory.ubi nvram set boot_wait=on nvram set uart_en=1 nvram set flag_boot_rootfs=1 nvram set flag_last_success=1 nvram set flag_boot_success=1 nvram set flag_try_sys1_failed=0 nvram set flag_try_sys2_failed=0 nvram commit reboot ``` If **firmware=1** ``` ubiformat /dev/mtd8 -y -f /tmp/openwrt-mediatek-filogic-xiaomi_mi-router-ax3000t-initramfs-factory.ubi nvram set boot_wait=on nvram set uart_en=1 nvram set flag_boot_rootfs=0 nvram set flag_last_success=0 nvram set flag_boot_success=1 nvram set flag_try_sys1_failed=0 nvram set flag_try_sys2_failed=0 nvram commit reboot ``` Then reboot your router, it should boot to the OpenWrt initramfs system now. 5. Flash openwrt-mediatek-filogic-xiaomi_mi-router-ax3000t-squashfs-sysupgrade.bin `sysupgrade -n /tmp/openwrt-mediatek-filogic-xiaomi_mi-router-ax3000t-squashfs-sysupgrade.bin` 1. Flash openwrt-mediatek-filogic-xiaomi_mi-router-ax3000t-ubootmod-initramfs-recovery.itb `ubiformat /dev/mtd8 -y -f /tmp/openwrt-mediatek-filogic-xiaomi_mi-router-ax3000t-ubootmod-initramfs-recovery.itb` `reboot` 2. Install kmod-mtd-rw `opkg update && opkg install kmod-mtd-rw` `insmod /lib/modules/$(uname -r)/mtd-rw.ko i_want_a_brick=1` 3. Format ubi and create new ubootenv volume ``` ubidetach -p /dev/mtd8; ubiformat /dev/mtd8 -y; ubiattach -p /dev/mtd8 ubimkvol /dev/ubi0 -n 0 -N ubootenv -s 128KiB ubimkvol /dev/ubi0 -n 1 -N ubootenv2 -s 128KiB ``` 4. *(Optional **-10Mb** free space) Add recovery boot feature.* ``` ubimkvol /dev/ubi0 -n 2 -N recovery -s 10MiB ubiupdatevol /dev/ubi0_2 /tmp/openwrt-mediatek-filogic-xiaomi_mi-router-ax3000t-ubootmod-initramfs-recovery.itb ``` 5. Flash Openwrt U-Boot ``` mtd write /tmp/openwrt-mediatek-filogic-xiaomi_mi-router-ax3000t-ubootmod-preloader.bin BL2 mtd write /tmp/openwrt-mediatek-filogic-xiaomi_mi-router-ax3000t-ubootmod-bl31-uboot.fip FIP ``` 6. Flash openwrt-mediatek-filogic-xiaomi_mi-router-ax3000t-ubootmod-squashfs-sysupgrade.itb `sysupgrade -n /tmp/openwrt-mediatek-filogic-xiaomi_mi-router-ax3000t-ubootmod-squashfs-sysupgrade.itb` 1. Force flash openwrt-mediatek-filogic-xiaomi_mi-router-ax3000t-ubootmod-initramfs-recovery.itb `sysupgrade -F -n /tmp/openwrt-mediatek-filogic-xiaomi_mi-router-ax3000t-ubootmod-initramfs-recovery.itb` 2. Format ubi and Nvram ``` ubidetach -p /dev/mtd8; ubiformat /dev/mtd8 -y; ubiattach -p /dev/mtd8 mtd erase Nvram ``` 3. Install kmod-mtd-rw `opkg update && opkg install kmod-mtd-rw` `insmod /lib/modules/$(uname -r)/mtd-rw.ko i_want_a_brick=1` 4. Flash stock images from backup ``` mtd write /tmp/BL2.bin BL2 mtd write /tmp/FIP.bin FIP mtd write /tmp/ubi.bin ubi ``` Then reboot your router, waiting it finished rollback in minutes. `ubiformat /dev/mtd7 -y -f /tmp/ubi.bin` Then reboot your router, waiting it finished rollback in minutes. Signed-off-by: Dim Fish <dimfish@gmail.com>
* ipq807x: add support for Linksys MX4200 V1 and V2Mohammad Sayful Islam2024-01-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Linksys MX4200 is a 802.11ax Tri-band router/AP. Specifications: * CPU: Qualcomm IPQ8174 Quad core Cortex-A53 1.4GHz * RAM: 512MB of DDR3 * Storage: 512Mb NAND * Ethernet: 4x1G RJ45 ports (QCA8075) * WLAN: * 2.4GHz: Qualcomm QCN5024 2x2 802.11b/g/n/ax 574 Mbps PHY rate * 5GHz: Qualcomm QCN5054 2x2@80MHz or 2x2@160MHz 802.11a/b/g/n/ac/ax 2402 PHY rate * 5GHz: Qualcomm QCN5054 4x4@80MHz or 2x2@160MHz 802.11a/b/g/n/ac/ax 2402 PHY rate * LED-s: * RGB system led * Buttons: 1x Soft reset 1x WPS * Power: 12V DC Jack Installation instructions: Open Linksys Web UI - http://192.168.1.1/ca or http://10.65.1.1/ca depending on your setup. Login with your admin password. The default password can be found on a sticker under the device. To enter into the support mode, click on the “CA” link and the bottom of the page. Open the “Connectivity” menu and upload the squash-factory image with the “Choose file” button. Click start. Ignore all the prompts and warnings by click “yes” in all the popups. The Wifi radios are turned off by default. To configure the router, you will need to connect your computer to the LAN port of the device. Then you would need to write openwrt to the other partition for it to work - First Check booted partition fw_printenv -n boot_part - Then install Openwrt to the other partition if booted in slot 1: mtd -r -e alt_kernel -n write openwrt-qualcommax-ipq807x-linksys_mx4200v(X)-squashfs-factory.bin alt_kernel - If in slot 2: mtd -r -e kernel -n write openwrt-qualcommax-ipq807x-linksys_mx4200v(X)-squashfs-factory.bin kernel Replace (X) with your model version either 1 or 2 Signed-off-by: Mohammad Sayful Islam <sayf.mohammad01@gmail.com> Reviewed-by: Robert Marko <robimarko@gmail.com>
* ramips: reset mt7620 ethernet phy via reset controllerShiji Yang2024-01-06
| | | | | | | | | | | Use reset controller to reset mt7620 ethernet phy instead of directly writing system control registers. The reset line of "ephy" is 24, so the DTS resets properties have been updated to get the correct reset signal. Tested on HiWiFi HC5861. Signed-off-by: Shiji Yang <yangshiji66@qq.com>
* ramips: reset mt7620 frame engine via reset controllerShiji Yang2024-01-06
| | | | | | | | | Use reset controller to reset mt7620 frame engine instead of directly writing system control registers. Tested on HiWiFi HC5861. Signed-off-by: Shiji Yang <yangshiji66@qq.com>
* kernel: bump 6.1 to 6.1.71John Audia2024-01-06
| | | | | | | | | | | | | | | Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.1.71 Manually rebased: gemini/patches-6.1/0002-usb-fotg210-Collect-pieces-of-dual-mode-controller.patch All patches automatically rebased. Build system: x86/64 Build-tested: x86/64/AMD Cezanne Run-tested: x86/64/AMD Cezanne Signed-off-by: John Audia <therealgraysky@proton.me>
* kernel: bump 5.15 to 5.15.146John Audia2024-01-06
| | | | | | | | | | | | | | | | | Changelog: https://cdn.kernel.org/pub/linux/kernel/v5.x/ChangeLog-5.15.146 Removed upstreamed: generic/hack-5.15/940-ksmbd-have-a-dependency-on-cifs-arc4.patch[1] All other patches automatically rebased. 1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.15.146&id=ac385518598f50dd1b9b41bd05f50ce9795481d5 Build system: x86_64 Build-tested: ramips/tplink_archer-a6-v3 Run-tested: ramips/tplink_archer-a6-v3 Signed-off-by: John Audia <therealgraysky@proton.me>
* mediatek: MERCUSYS MR90X v1: remove deprecated led "label" propertiesMikhail Zhilkin2024-01-06
| | | | | | | | | | | This commit: 1. Removes deprecated "label" property from the dts leds subnnodes; 2. Updates "01_leds" script. Link: https://www.kernel.org/doc/Documentation/devicetree/bindings/leds/common.yaml Link: https://www.kernel.org/doc/Documentation/devicetree/bindings/leds/leds-gpio.yaml Signed-off-by: Mikhail Zhilkin <csharper2005@gmail.com>
* realtek: correct typo in port numberingMichael 'ASAP' Weinrich2024-01-05
| | | | | | Port 10 was incorrectly labelled as nonexistent port 0. Signed-off-by: Michael 'ASAP' Weinrich <michael@a5ap.net>
* realtek: fix network connectivity on GS750EMichael 'ASAP' Weinrich2024-01-05
| | | | | | | | | | | Currently OpenWRT does not know how to properly reset the network switch. This would result in a switch that seemed to come up properly but was unable to handle any traffic. Presumably something earlier in the boot chain is configuring a part of the switch that gets wiped out when its reset. For now comment out the reset GPIO entry in the device tree until the driver better supports bringing up the switch after a reset. Signed-off-by: Michael 'ASAP' Weinrich <michael@a5ap.net>
* ag71xx: fix wrong register definition issueRosen Penev2024-01-05
| | | | | | Documentation fix from QCA SDK. Signed-off-by: Rosen Penev <rosenp@gmail.com>
* ath79: move kernel and ubi into subnodesRosen Penev2024-01-05
| | | | | | | | Avoids dtc warnings regarding two sections having the same numbers. X: duplicate unit-address (also used in node Y) Signed-off-by: Rosen Penev <rosenp@gmail.com>
* ath79: gpio to gpiosRosen Penev2024-01-05
| | | | | | Fixes deprecated_gpio_property dtc warning Signed-off-by: Rosen Penev <rosenp@gmail.com>
* ath79: fix pci_device_reg errorsRosen Penev2024-01-05
| | | | | | Found by dtc. Wrong numbers and wrong ordering. Signed-off-by: Rosen Penev <rosenp@gmail.com>
* ath79: fix unit_address_format warningRosen Penev2024-01-05
| | | | | | Raised by dtc. Signed-off-by: Rosen Penev <rosenp@gmail.com>
* ath79: fix avoid_unnecessary_addr_size warningsRosen Penev2024-01-05
| | | | | | Raised to dtc. Signed-off-by: Rosen Penev <rosenp@gmail.com>
* ath79: rename pcie-controller to pcieRosen Penev2024-01-05
| | | | | | | pcie-controller was renamed to pcie since at least kernel 4.14. Match it here to get rid of dtc warnings. Signed-off-by: Rosen Penev <rosenp@gmail.com>
* ramips: fix dtc warningsRosen Penev2024-01-05
| | | | | | Mostly leading 0 removals and wrong addresses. Signed-off-by: Rosen Penev <rosenp@gmail.com>
* treewide: use ethtool_puts instead of memcpyRosen Penev2024-01-05
| | | | | | The former is a safer and more readable version. Signed-off-by: Rosen Penev <rosenp@gmail.com>
* kernel: backport ethtool_putsRosen Penev2024-01-05
| | | | | | Will be used for conversions in the following commit. Signed-off-by: Rosen Penev <rosenp@gmail.com>
* kernel: fix bridge proxyarp issue with some broken DHCP clientsFelix Fietkau2024-01-05
| | | | | | | | | | | There are broken devices in the wild that handle duplicate IP address detection by sending out ARP requests for the IP that they received from a DHCP server and refuse the address if they get a reply. When proxyarp is enabled, they would go into a loop of requesting an address and then NAKing it again. Fixes: https://github.com/openwrt/openwrt/issues/14309 Signed-off-by: Felix Fietkau <nbd@nbd.name>
* kernel/ksmbd: fix build for 5.15.145John Audia2024-01-04
| | | | | | | | | | | | | Include a patch[1] under review to fix the modpost error due to upstream changes: ... ERROR: modpost: "cifs_arc4_crypt" [fs/ksmbd/ksmbd.ko] undefined! ERROR: modpost: "cifs_arc4_setkey" [fs/ksmbd/ksmbd.ko] undefined! scripts/Makefile.modpost:133: recipe for target 'modules-only.symvers' failed 1. https://lore.kernel.org/all/20231227102605.4766-2-linkinjeon@kernel.org/ Signed-off-by: John Audia <therealgraysky@proton.me>
* rockchip: configure eth pad driver strength for orangepi r1 plus ltsTianling Shen2024-01-04
| | | | | | | | | | | The default strength is not enough to provide stable connection under 3.3v LDO voltage. Fixes: 32d5921b8b55 ("rockchip: add Orange Pi R1 Plus LTS support") Fixes: #13117 Fixes: #13759 Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
* ipq807x: cax1800: fix blsp1_spi1 status with okayPetr Štetiar2024-01-03
| | | | | | | | `ok` status is obsolete and thus `okay` should be used instead: spi@78b9000: status:0: 'ok' is not one of ['okay', 'disabled', 'reserved'] Signed-off-by: Petr Štetiar <ynezz@true.cz>
* ramips: unielec-u7621-01: Increase SPI frequency to 50MHzDavid Bentham2024-01-03
| | | | | | | | | | | | Flash: 16MB SPI NOR flash (Macronix MX25L12805D) Based on the manufactured datasheet this chip is capable of 50MHz. We dont enable fast-read as mt7621 are only capable of 44mhz in a read state. Tested on this unit without any issues. Signed-off-by: David Bentham <db260179@gmail.com>
* ramips: lzma-loader: use default uart for rt305xMichael Pratt2024-01-02
| | | | | | | | | | | | | The rt305x series SOC have two UART devices, and the one at bus address 0x500 is disabled by default. Some boards do not even have a pinout for the first one, so use the same one that the kernel uses at 0xc00 instead. This allows the lzma-loader printing to be visible alongside the kernel log in the same console. Tested-by: Lech Perczak <lech.perczak@gmail.com> # zte,mf283plus Signed-off-by: Michael Pratt <mcpratt@pm.me>
* ramips: lzma-loader: use proper register namesMichael Pratt2024-01-02
| | | | | | | | | | | | | | | | | | | | | | | | | Before this was reworked, in the file for mt7621 subtarget (target/linux/ramips/image/lzma-loader/src/board-mt7621.c) the "Transmitter shift register empty" bit TEMT was used instead of the "Transmitter holding register empty" bit THRE, but after the rework, this value was labeled as the THRE bit instead. Functionally there is no difference, but this is confusing to read, as it suggests that the subtargets have different bits for the same register in UART when in reality they are exactly the same. One can use either bit, or both, at user's descretion in order to determine whether the UART TX buffer is ready. The generic kernel early-printk uses both, (arch/mips/kernel/early_printk_8250.c) while the ralink-specific early-printk uses only THRE, (arch/mips/ralink/early_printk.c). Define both bits and rewrite macros for readability, keep the same values, as changing which to use should be tested first. Ref: c31319b66 ("ramips: lzma-loader: Refactor loader") Signed-off-by: Michael Pratt <mcpratt@pm.me>
* ramips: lzma-loader: use virtual memory segments for uart base addressMichael Pratt2024-01-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The native bus address for UART was entered for rt305x UART_BASE, but the bootloaders have memory space remapped with the same virtual memory map the kernel uses for program addressing at boot time. In UBoot, the remapped address is often defined as TEXT_BASE. In the kernel, for rt305x this remapped address is RT305X_SYSC_BASE. (arch/mips/include/asm/mach-ralink/rt305x.h) Because the ralink I/O busses begin at a low address of 0x10000000, they are remapped using KSEG0 or KSEG1, which for all 32-bit MIPS SOCs (arch/mips/include/asm/addrspace.h) are offsets of 0x80000000 and 0xa0000000 respectively. This is consistent with the other UART_BASE macros here and with MIPS memory map documentation. Before the recent rework of the lzma-loader for ramips, the original board-$(PLATFORM).c files also did not use KSEG1ADDR for UART_BASE despite being defined, which made this mistake easier to occur. Fix this by defining KSEG1ADDR again and actually use it. Copy and paste from the kernel's macros for consistency. Link: https://training.mips.com/basic_mips/PDF/Memory_Map.pdf Fixes: c31319b66 ("ramips: lzma-loader: Refactor loader") Reported-by: Lech Perczak <lech.perczak@gmail.com> Signed-off-by: Michael Pratt <mcpratt@pm.me>
* raimps: mtk_eth_soc: drop rst_esw from ESW driverLech Perczak2024-01-02
| | | | | | | | | | | | | | | | | The ESW core needs to be reset together with FE core, so after the relevant reset controller lines are moved under FE, drop rst_esw and all related code, which would not execute anyway, because rst_esw would be NULL. While at that, ensure that if reset line for EPHY cannot be claimed, a proper error message is reported. Fixes: 60fadae62b64 ("ramips: ethernet: ralink: move reset of the esw into the esw instead of fe") Co-developed-by: Maxim Anisimov <maxim.anisimov.ua@gmail.com> Signed-off-by: Maxim Anisimov <maxim.anisimov.ua@gmail.com> [Split out of the bigger commit, provide commit mesage, refactor error handling] Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
* ramips: dts: mt7628an: reset FE and ESW cores togetherMaxim Anisimov2024-01-02
| | | | | | | | | | | | | Failing to do so will cause the DMA engine to not initialize properly and fail to forward packets between them, and in some cases will cause spurious transmission with size exceeding allowed packet size, causing a kernel panic. Fixes: 60fadae62b64 ("ramips: ethernet: ralink: move reset of the esw into the esw instead of fe") Signed-off-by: Maxim Anisimov <maxim.anisimov.ua@gmail.com> [Provide commit description, split into logical changes] Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
* ramips: dts: rt5350: reset FE and ESW cores togetherLech Perczak2024-01-02
| | | | | | | | | | | | | | | | Failing to do so will cause the DMA engine to not initialize properly and fail to forward packets between them, and in some cases will cause spurious transmission with size exceeding allowed packet size, causing a kernel panic. This is behaviour of downstream driver as well, however I haven't observed bug reports about this SoC in the wild, so this commit's purpose is to align this chip with all other SoC's - MT7620 were already using this arrangement. Fixes: #9284 Fixes: 60fadae62b64 ("ramips: ethernet: ralink: move reset of the esw into the esw instead of fe") Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
* ramips: dts: rt3050: reset FE and ESW cores togetherLech Perczak2024-01-02
| | | | | | | | | | | | | | | Failing to do so will cause the DMA engine to not initialize properly and fail to forward packets between them, and in some cases will cause spurious transmission with size exceeding allowed packet size, causing a kernel panic. This is behaviour of downstream driver as well, however I haven't observed bug reports about this SoC in the wild, so this commit's purpose is to align this chip with all other SoC's - MT7620 were already using this arrangement. Fixes: 60fadae62b64 ("ramips: ethernet: ralink: move reset of the esw into the esw instead of fe") Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
* ramips: dts: rt3352: reset FE and ESW cores togetherMaxim Anisimov2024-01-02
| | | | | | | | | | | | | Failing to do so will cause the DMA engine to not initialize properly and fail to forward packets between them, and in some cases will cause spurious transmission with size exceeding allowed packet size, causing a kernel panic. Fixes: 60fadae62b64 ("ramips: ethernet: ralink: move reset of the esw into the esw instead of fe") Signed-off-by: Maxim Anisimov <maxim.anisimov.ua@gmail.com> [Provide commit description, split into logical changes] Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
* ramips: mtk_eth_soc: wait longer after FE core reset to settleMaxim Anisimov2024-01-02
| | | | | | | | | | | | Enabling the FE core too early causes the system to hang during boot uncondtionally, after the reset is released. Increate it to 1-1.2ms range. Fixes: 60fadae62b64 ("ramips: ethernet: ralink: move reset of the esw into the esw instead of fe") Signed-off-by: Maxim Anisimov <maxim.anisimov.ua@gmail.com> [Split previous commit, provide rationale] Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
* ramips: mtk_eth_soc: allow multiple resetsLech Perczak2024-01-02
| | | | | | | | | | | | | | | | | | Use devm_reset_control_array_get_exclusive to register multiple reset lines in FE driver. This is required to reattach ESW reset to FE driver again, based on device tree bindings. While at that, remove unused fe_priv.rst_ppe field, and add error message if getting the reset fails. Fixes: 60fadae62b64 ("ramips: ethernet: ralink: move reset of the esw into the esw instead of fe") Co-developed-by: Maxim Anisimov <maxim.anisimov.ua@gmail.com> Signed-off-by: Maxim Anisimov <maxim.anisimov.ua@gmail.com> [Split out of the bigger commit, provide commit mesage, refactor error handling] Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
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